gte-edgecase.c File Reference

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Functions
	CESTER_TEST (edge_div_by_zero, gte_tests, gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 200);cop2_put(0,(0<< 16)|100);cop2_put(1, 0);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t sz3, sxy2, flag;cop2_get(19, sz3);cop2_get(14, sxy2);flag=gte_read_flag();ramsyscall_printf("div/0: SZ3=%u SXY2=0x%08x FLAG=0x%08x\n", sz3, sxy2, flag);uint32_t f17=(flag > > 17) &1;cester_assert_uint_eq(1, f17);) CESTER_TEST(edge_div_h_zero
	gte_set_identity_rotation ()
	gte_set_translation (0, 0, 0)
	gte_set_screen (0, 0, 0)
	cop2_put (0,(0<< 16)|100)
	cop2_put (1, 1000)
	gte_clear_flag ()
	cop2_cmd (COP2_RTPS(1, 0))
	cop2_get (14, sxy2)
	ramsyscall_printf ("H=0: SX=%d FLAG=0x%08x\n", sx, flag)
	cester_assert_int_eq (0, sx)
	cester_assert_uint_eq (0, f17)
	CESTER_TEST (edge_div_boundary_under, gte_tests, gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 199);cop2_put(0,(0<< 16)|100);cop2_put(1, 100);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t flag;flag=gte_read_flag();uint32_t f17=(flag > > 17) &1;ramsyscall_printf("div boundary under: H=199 SZ3=100 FLAG.17=%u\n", f17);cester_assert_uint_eq(0, f17);) CESTER_TEST(edge_div_boundary_at
	gte_set_screen (0, 0, 200)
	cop2_put (1, 100)
	cester_assert_uint_eq (1, f17)
	CESTER_TEST (edge_div_boundary_over, gte_tests, gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 201);cop2_put(0,(0<< 16)|100);cop2_put(1, 100);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t flag;flag=gte_read_flag();uint32_t f17=(flag > > 17) &1;cester_assert_uint_eq(1, f17);) CESTER_TEST(edge_ir_max_no_sat
	cop2_put (8, 0x1000)
	cop2_put (9, 0x7fff)
	cop2_put (10, 0x7fff)
	cop2_put (11, 0x7fff)
	cop2_put (6, 0x00808080)
	cop2_cmd (COP2_GPF(1, 0))
	cop2_get (9, ir1)
	cester_assert_uint_eq (0x7fff, ir1)
	cester_assert_uint_eq (0, f24)
	CESTER_TEST (edge_ir_over_max, gte_tests, cop2_put(8, 0x1001);cop2_put(9, 0x7fff);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t ir1;cop2_get(9, ir1);uint32_t flag=gte_read_flag();ramsyscall_printf("IR over max: IR1=0x%04x FLAG=0x%08x\n", ir1 &0xffff, flag);cester_assert_uint_eq(0x7fff, ir1);uint32_t f24=(flag > > 24) &1;cester_assert_uint_eq(1, f24);) CESTER_TEST(edge_mac0_positive_overflow
	cop2_put (12,(0x7fff<< 16)|0x7fff)
	cop2_put (13,(0x8000<< 16)|0x8000)
	cop2_put (14, 0x00000000)
	cop2_cmd (COP2_NCLIP)
	cop2_get (24, mac0)
	cester_assert_int_eq (0, mac0)
	cester_assert_uint_eq (0x00000000, flag)
	CESTER_TEST (edge_mac0_negative_overflow, gte_tests, cop2_put(12,(0x7fff<< 16)|0x7fff);cop2_put(13,(0x7fff<< 16)|0x8000);cop2_put(14,(0x8000<< 16)|0x7fff);gte_clear_flag();cop2_cmd(COP2_NCLIP);int32_t mac0;uint32_t flag;cop2_get(24, mac0);flag=gte_read_flag();ramsyscall_printf("MAC0 neg overflow: MAC0=%d FLAG=0x%08x\n", mac0, flag);cester_assert_int_eq(-131071, mac0);uint32_t f16=(flag > > 16) &1;cester_assert_uint_eq(1, f16);) CESTER_TEST(edge_color_at_255
	cop2_put (9, 0x0ff0)
	cop2_put (10, 0x0ff0)
	cop2_put (11, 0x0ff0)
	cop2_get (22, rgb2)
	cester_assert_uint_eq (255, r_255)
	cester_assert_uint_eq (0, f21_255)
	CESTER_TEST (edge_color_at_256, gte_tests, cop2_put(8, 0x1000);cop2_put(9, 0x1000);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t rgb2, flag;cop2_get(22, rgb2);flag=gte_read_flag();uint32_t r_256=rgb2 &0xff;cester_assert_uint_eq(255, r_256);uint32_t f21_256=(flag > > 21) &1;cester_assert_uint_eq(1, f21_256);) CESTER_TEST(edge_color_negative
	cop2_put (9, 0xffff8000)
	cop2_put (10, 0x100)
	cop2_put (11, 0x100)
	cester_assert_uint_eq (0, r_neg)
	cester_assert_uint_eq (1, f21_neg)
	CESTER_TEST (edge_sx_at_max, gte_tests, gte_set_identity_rotation();gte_set_translation(0, 0, 0);cop2_putc(24, 0x3ff<< 16);cop2_putc(25, 0);cop2_putc(26, 0);cop2_putc(27, 0);cop2_putc(28, 0);cop2_put(0, 0);cop2_put(1, 1000);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t sxy2, flag;cop2_get(14, sxy2);flag=gte_read_flag();int16_t sx=(int16_t)(sxy2 &0xffff);cester_assert_int_eq(0x3ff, sx);uint32_t f14=(flag > > 14) &1;cester_assert_uint_eq(0, f14);) CESTER_TEST(edge_sx_over_max
	cop2_putc (24, 0x400<< 16)
	cop2_putc (25, 0)
	cop2_putc (26, 0)
	cop2_putc (27, 0)
	cop2_putc (28, 0)
	cop2_put (0, 0)
	cester_assert_int_eq (0x3ff, sx)
	cester_assert_uint_eq (1, f14)
	CESTER_TEST (edge_sy_at_min, gte_tests, gte_set_identity_rotation();gte_set_translation(0, 0, 0);cop2_putc(24, 0);cop2_putc(25,(uint32_t)(-0x400)<< 16);cop2_putc(26, 0);cop2_putc(27, 0);cop2_putc(28, 0);cop2_put(0, 0);cop2_put(1, 1000);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t sxy2, flag;cop2_get(14, sxy2);flag=gte_read_flag();int16_t sy=(int16_t)(sxy2 > > 16);cester_assert_int_eq(-0x400, sy);uint32_t f13=(flag > > 13) &1;cester_assert_uint_eq(0, f13);) CESTER_TEST(edge_zero_matrix
	cop2_putc (0, 0)
	cop2_putc (1, 0)
	cop2_putc (2, 0)
	cop2_putc (3, 0)
	cop2_putc (4, 0)
	gte_set_translation (100, 200, 300)
	cop2_put (0,(0x7fff<< 16)|0x7fff)
	cop2_put (1, 0x7fff)
	cop2_cmd (COP2_MVMVA(1, COP2_MX_RT, COP2_V_V0, COP2_CV_TR, 0))
	cop2_get (25, mac1)
	cop2_get (26, mac2)
	cop2_get (27, mac3)
	cester_assert_int_eq (100, mac1)
	cester_assert_int_eq (200, mac2)
	cester_assert_int_eq (300, mac3)
	CESTER_TEST (edge_max_matrix, gte_tests, cop2_putc(0, 0x7fff7fff);cop2_putc(1, 0x7fff7fff);cop2_putc(2, 0x7fff7fff);cop2_putc(3, 0x7fff7fff);cop2_putc(4, 0x7fff);gte_set_translation(0, 0, 0);cop2_put(0,(0x7fff<< 16)|0x7fff);cop2_put(1, 0x7fff);gte_clear_flag();cop2_cmd(COP2_MVMVA(1, COP2_MX_RT, COP2_V_V0, COP2_CV_NONE, 0));int32_t mac1;uint32_t flag;cop2_get(25, mac1);flag=gte_read_flag();ramsyscall_printf("max matrix: MAC1=%d FLAG=0x%08x\n", mac1, flag);cester_assert_int_eq(786384, mac1);cester_assert_uint_eq(0x81c00000, flag);) CESTER_TEST(edge_negative_z
	gte_set_translation (0, 0, -1000)
	gte_set_screen (160<< 16, 120<< 16, 200)
	cop2_put (1, 0)
	cop2_get (19, sz3)
	cester_assert_int_eq (-1000, mac3)
	cester_assert_uint_eq (0, sz3)
	cester_assert_uint_eq (1, f18)
	CESTER_TEST (edge_sqr_min_negative, gte_tests, cop2_put(9, 0xffff8000);cop2_put(10, 0);cop2_put(11, 0);gte_clear_flag();cop2_cmd(COP2_SQR(0, 0));int32_t mac1;uint32_t flag;cop2_get(25, mac1);flag=gte_read_flag();ramsyscall_printf("SQR(-32768): MAC1=%d FLAG=0x%08x\n", mac1, flag);cester_assert_int_eq(1073741824, mac1);) CESTER_TEST(edge_gpl_negative_base
	cop2_put (25, -10000)
	cop2_put (26, -20000)
	cop2_put (27, -30000)
	cop2_put (9, 100)
	cop2_put (10, 200)
	cop2_put (11, 300)
	cop2_cmd (COP2_GPL(1, 0))
	cester_assert_int_eq (-9900, mac1)
	cester_assert_int_eq (-19800, mac2)
	CESTER_TEST (edge_flag_cleared_each_instruction, gte_tests, cop2_put(8, 0x1001);cop2_put(9, 0x7fff);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t flag1=gte_read_flag();uint32_t f24_1=(flag1 > > 24) &1;cester_assert_uint_eq(1, f24_1);cop2_put(8, 0x1000);cop2_put(9, 0x100);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);cop2_cmd(COP2_GPF(1, 0));uint32_t flag2=gte_read_flag();cester_assert_uint_eq(0, flag2);) CESTER_TEST(edge_ir0_at_max
	cop2_putc (24, 0)
	cop2_putc (26, 200)
	cop2_putc (28, 0x1000000)
	cop2_get (8, ir0)
	cester_assert_uint_eq (0, f12)
	CESTER_TEST (edge_otz_at_max, gte_tests, cop2_put(17, 0x5555);cop2_put(18, 0x5555);cop2_put(19, 0x5555);cop2_putc(29, 0x1000);gte_clear_flag();cop2_cmd(COP2_AVSZ3);uint32_t otz, flag;cop2_get(7, otz);flag=gte_read_flag();ramsyscall_printf("OTZ max: OTZ=%u FLAG=0x%08x\n", otz, flag);cester_assert_uint_eq(0xffff, otz);) CESTER_TEST(edge_depthcue_fc_less_than_input
	gte_set_far_color (0, 0, 0)
	cop2_put (6, 0x00ffffff)
	cop2_put (8, 0x0800)
	cop2_cmd (COP2_DPCS(1, 0))
	cester_assert_int_eq (2040, mac1)
	cester_assert_uint_eq (0x007f7f7f, rgb2)

Variables
	gte_tests
uint32_t	sxy2
uint32_t	flag = gte_read_flag()
int16_t	sx = (int16_t)(sxy2 & 0xffff)
uint32_t	f17 = (flag >> 17) & 1
uint32_t	ir1
uint32_t	f24 = (flag >> 24) & 1
int32_t	mac0
uint32_t	rgb2
uint32_t	r_255 = rgb2 & 0xff
uint32_t	f21_255 = (flag >> 21) & 1
uint32_t	r_neg = rgb2 & 0xff
uint32_t	f21_neg = (flag >> 21) & 1
uint32_t	f14 = (flag >> 14) & 1
int32_t	mac1
int32_t	mac2
int32_t	mac3
uint32_t	sz3
uint32_t	f18 = (flag >> 18) & 1
uint32_t	ir0
uint32_t	f12 = (flag >> 12) & 1

Function Documentation

cester_assert_int_eq() [1/10]

cester_assert_int_eq	(	-	1000,
		mac3
	)

cester_assert_int_eq() [2/10]

cester_assert_int_eq	(	-	19800,
		mac2
	)

cester_assert_int_eq() [3/10]

cester_assert_int_eq	(	-	9900,
		mac1
	)

cester_assert_int_eq() [4/10]

cester_assert_int_eq	(	0	,
		mac0
	)

cester_assert_int_eq() [5/10]

cester_assert_int_eq	(	0	,
		sx
	)

cester_assert_int_eq() [6/10]

cester_assert_int_eq	(	0x3ff	,
		sx
	)

cester_assert_int_eq() [7/10]

cester_assert_int_eq	(	100	,
		mac1
	)

cester_assert_int_eq() [8/10]

cester_assert_int_eq	(	200	,
		mac2
	)

cester_assert_int_eq() [9/10]

cester_assert_int_eq	(	2040	,
		mac1
	)

cester_assert_int_eq() [10/10]

cester_assert_int_eq	(	300	,
		mac3
	)

cester_assert_uint_eq() [1/14]

cester_assert_uint_eq	(	0	,
		f12
	)

cester_assert_uint_eq() [2/14]

cester_assert_uint_eq	(	0	,
		f17
	)

cester_assert_uint_eq() [3/14]

cester_assert_uint_eq	(	0	,
		f21_255
	)

cester_assert_uint_eq() [4/14]

cester_assert_uint_eq	(	0	,
		f24
	)

cester_assert_uint_eq() [5/14]

cester_assert_uint_eq	(	0	,
		r_neg
	)

cester_assert_uint_eq() [6/14]

cester_assert_uint_eq	(	0	,
		sz3
	)

cester_assert_uint_eq() [7/14]

cester_assert_uint_eq	(	0x00000000	,
		flag
	)

cester_assert_uint_eq() [8/14]

cester_assert_uint_eq	(	0x007f7f7f	,
		rgb2
	)

cester_assert_uint_eq() [9/14]

cester_assert_uint_eq	(	0x7fff	,
		ir1
	)

cester_assert_uint_eq() [10/14]

cester_assert_uint_eq	(	1	,
		f14
	)

cester_assert_uint_eq() [11/14]

cester_assert_uint_eq	(	1	,
		f17
	)

cester_assert_uint_eq() [12/14]

cester_assert_uint_eq	(	1	,
		f18
	)

cester_assert_uint_eq() [13/14]

cester_assert_uint_eq	(	1	,
		f21_neg
	)

cester_assert_uint_eq() [14/14]

cester_assert_uint_eq	(	255	,
		r_255
	)

CESTER_TEST() [1/12]

CESTER_TEST	(	edge_color_at_256	,
		gte_tests	,
		cop2_put(8, 0x1000);cop2_put(9, 0x1000);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t	rgb2,
		flag;cop2_get(22, rgb2);	flag = gte_read_flag(); uint32_t r_256 = rgb2 & 0xff; cester_assert_uint_eq(255, r_256);  uint32_t f21_256 = (flag >> 21) & 1; cester_assert_uint_eq(1, f21_256);
	)

CESTER_TEST() [2/12]

CESTER_TEST	(	edge_div_boundary_over	,
		gte_tests	,
		gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 201);cop2_put(0,(0<< 16)|100);cop2_put(1, 100);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t flag;	flag = gte_read_flag(); uint32_t f17 = (flag >> 17) & 1; cester_assert_uint_eq(1, f17);
	)

CESTER_TEST() [3/12]

CESTER_TEST	(	edge_div_boundary_under	,
		gte_tests	,
		gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 199);cop2_put(0,(0<< 16)|100);cop2_put(1, 100);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t flag;	flag = gte_read_flag(); uint32_t f17 = (flag >> 17) & 1; ramsyscall_printf("div boundary under: H=199 SZ3=100 FLAG.17=%u\n", f17); cester_assert_uint_eq(0, f17);
	)

CESTER_TEST() [4/12]

CESTER_TEST	(	edge_div_by_zero	,
		gte_tests	,
		gte_set_identity_rotation();gte_set_translation(0, 0, 0);gte_set_screen(0, 0, 200);cop2_put(0,(0<< 16)|100);cop2_put(1, 0);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t	sz3,
		sxy2	,
		flag;cop2_get(19, sz3);cop2_get(14, sxy2);	flag = gte_read_flag(); ramsyscall_printf("div/0: SZ3=%u SXY2=0x%08x FLAG=0x%08x\n", sz3, sxy2, flag);  uint32_t f17 = (flag >> 17) & 1; cester_assert_uint_eq(1, f17);
	)

CESTER_TEST() [5/12]

CESTER_TEST	(	edge_flag_cleared_each_instruction	,
		gte_tests	,
		cop2_put(8, 0x1001);cop2_put(9, 0x7fff);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t	flag1 = gte_read_flag(); uint32_t f24_1 = (flag1 >> 24) & 1; cester_assert_uint_eq(1, f24_1);   cop2_put(8, 0x1000); cop2_put(9, 0x100); cop2_put(10, 0x100); cop2_put(11, 0x100); cop2_put(6, 0x00808080);  cop2_cmd(COP2_GPF(1, 0)); uint32_t flag2 = gte_read_flag();  cester_assert_uint_eq(0, flag2);
	)

CESTER_TEST() [6/12]

CESTER_TEST	(	edge_ir_over_max	,
		gte_tests	,
		cop2_put(8, 0x1001);cop2_put(9, 0x7fff);cop2_put(10, 0x100);cop2_put(11, 0x100);cop2_put(6, 0x00808080);gte_clear_flag();cop2_cmd(COP2_GPF(1, 0));uint32_t ir1;cop2_get(9, ir1);uint32_t	flag = gte_read_flag(); ramsyscall_printf("IR over max: IR1=0x%04x FLAG=0x%08x\n", ir1 & 0xffff, flag);  cester_assert_uint_eq(0x7fff, ir1); uint32_t f24 = (flag >> 24) & 1; cester_assert_uint_eq(1, f24);
	)

CESTER_TEST() [7/12]

CESTER_TEST	(	edge_mac0_negative_overflow	,
		gte_tests	,
		cop2_put(12,(0x7fff<< 16)|0x7fff);cop2_put(13,(0x7fff<< 16)|0x8000);cop2_put(14,(0x8000<< 16)|0x7fff);gte_clear_flag();cop2_cmd(COP2_NCLIP);int32_t mac0;uint32_t flag;cop2_get(24, mac0);	flag = gte_read_flag(); ramsyscall_printf("MAC0 neg overflow: MAC0=%d FLAG=0x%08x\n", mac0, flag);   cester_assert_int_eq(-131071, mac0);  uint32_t f16 = (flag >> 16) & 1; cester_assert_uint_eq(1, f16);
	)

CESTER_TEST() [8/12]

CESTER_TEST	(	edge_max_matrix	,
		gte_tests	,
		cop2_putc(0, 0x7fff7fff);cop2_putc(1, 0x7fff7fff);cop2_putc(2, 0x7fff7fff);cop2_putc(3, 0x7fff7fff);cop2_putc(4, 0x7fff);gte_set_translation(0, 0, 0);cop2_put(0,(0x7fff<< 16)|0x7fff);cop2_put(1, 0x7fff);gte_clear_flag();cop2_cmd(COP2_MVMVA(1, COP2_MX_RT, COP2_V_V0, COP2_CV_NONE, 0));int32_t mac1;uint32_t flag;cop2_get(25, mac1);	flag = gte_read_flag(); ramsyscall_printf("max matrix: MAC1=%d FLAG=0x%08x\n", mac1, flag);   cester_assert_int_eq(786384, mac1); cester_assert_uint_eq(0x81c00000, flag);
	)

CESTER_TEST() [9/12]

CESTER_TEST	(	edge_otz_at_max	,
		gte_tests	,
		cop2_put(17, 0x5555);cop2_put(18, 0x5555);cop2_put(19, 0x5555);cop2_putc(29, 0x1000);gte_clear_flag();cop2_cmd(COP2_AVSZ3);uint32_t	otz,
		flag;cop2_get(7, otz);	flag = gte_read_flag(); ramsyscall_printf("OTZ max: OTZ=%u FLAG=0x%08x\n", otz, flag);  cester_assert_uint_eq(0xffff, otz);
	)

CESTER_TEST() [10/12]

CESTER_TEST	(	edge_sqr_min_negative	,
		gte_tests	,
		cop2_put(9, 0xffff8000);cop2_put(10, 0);cop2_put(11, 0);gte_clear_flag();cop2_cmd(COP2_SQR(0, 0));int32_t mac1;uint32_t flag;cop2_get(25, mac1);	flag = gte_read_flag();  ramsyscall_printf("SQR(-32768): MAC1=%d FLAG=0x%08x\n", mac1, flag); cester_assert_int_eq(1073741824, mac1);
	)

CESTER_TEST() [11/12]

CESTER_TEST	(	edge_sx_at_max	,
		gte_tests	,
		gte_set_identity_rotation();gte_set_translation(0, 0, 0);cop2_putc(24, 0x3ff<< 16);cop2_putc(25, 0);cop2_putc(26, 0);cop2_putc(27, 0);cop2_putc(28, 0);cop2_put(0, 0);cop2_put(1, 1000);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t	sxy2,
		flag;cop2_get(14, sxy2);	flag = gte_read_flag(); int16_t sx = (int16_t)(sxy2 & 0xffff); cester_assert_int_eq(0x3ff, sx); uint32_t f14 = (flag >> 14) & 1; cester_assert_uint_eq(0, f14);
	)

CESTER_TEST() [12/12]

CESTER_TEST	(	edge_sy_at_min	,
		gte_tests	,
		gte_set_identity_rotation();gte_set_translation(0, 0, 0);cop2_putc(24, 0);cop2_putc(25,(uint32_t)(-0x400)<< 16);cop2_putc(26, 0);cop2_putc(27, 0);cop2_putc(28, 0);cop2_put(0, 0);cop2_put(1, 1000);gte_clear_flag();cop2_cmd(COP2_RTPS(1, 0));uint32_t	sxy2,
		flag;cop2_get(14, sxy2);	flag = gte_read_flag(); int16_t sy = (int16_t)(sxy2 >> 16); cester_assert_int_eq(-0x400, sy); uint32_t f13 = (flag >> 13) & 1; cester_assert_uint_eq(0, f13);
	)

cop2_cmd() [1/6]

cop2_cmd

(

COP2_DPCS(1, 0)

)

cop2_cmd() [2/6]

cop2_cmd

(

COP2_GPF(1, 0)

)

cop2_cmd() [3/6]

cop2_cmd

(

COP2_GPL(1, 0)

)

cop2_cmd() [4/6]

cop2_cmd

(

COP2_MVMVA(1, COP2_MX_RT, COP2_V_V0, COP2_CV_TR, 0)

)

cop2_cmd() [5/6]

cop2_cmd

(

COP2_NCLIP

)

cop2_cmd() [6/6]

cop2_cmd

(

COP2_RTPS(1, 0)

)

cop2_get() [1/9]

cop2_get	(	14	,
		sxy2
	)

cop2_get() [2/9]

cop2_get	(	19	,
		sz3
	)

cop2_get() [3/9]

cop2_get	(	22	,
		rgb2
	)

cop2_get() [4/9]

cop2_get	(	24	,
		mac0
	)

cop2_get() [5/9]

cop2_get	(	25	,
		mac1
	)

cop2_get() [6/9]

cop2_get	(	26	,
		mac2
	)

cop2_get() [7/9]

cop2_get	(	27	,
		mac3
	)

cop2_get() [8/9]

cop2_get	(	8	,
		ir0
	)

cop2_get() [9/9]

cop2_get	(	9	,
		ir1
	)

cop2_put() [1/29]

cop2_put	(	0	,
		0
	)

cop2_put() [2/29]

cop2_put	(	0	,
		(0<< 16)|	100
	)

cop2_put() [3/29]

cop2_put	(	0	,
		(0x7fff<< 16)|	0x7fff
	)

cop2_put() [4/29]

cop2_put	(	1	,
		0
	)

cop2_put() [5/29]

cop2_put	(	1	,
		0x7fff
	)

cop2_put() [6/29]

cop2_put	(	1	,
		100
	)

cop2_put() [7/29]

cop2_put	(	1	,
		1000
	)

cop2_put() [8/29]

cop2_put	(	10	,
		0x0ff0
	)

cop2_put() [9/29]

cop2_put	(	10	,
		0x100
	)

cop2_put() [10/29]

cop2_put	(	10	,
		0x7fff
	)

cop2_put() [11/29]

cop2_put	(	10	,
		200
	)

cop2_put() [12/29]

cop2_put	(	11	,
		0x0ff0
	)

cop2_put() [13/29]

cop2_put	(	11	,
		0x100
	)

cop2_put() [14/29]

cop2_put	(	11	,
		0x7fff
	)

cop2_put() [15/29]

cop2_put	(	11	,
		300
	)

cop2_put() [16/29]

cop2_put	(	12	,
		(0x7fff<< 16)|	0x7fff
	)

cop2_put() [17/29]

cop2_put	(	13	,
		(0x8000<< 16)|	0x8000
	)

cop2_put() [18/29]

cop2_put	(	14	,
		0x00000000
	)

cop2_put() [19/29]

cop2_put	(	25	,
		-	10000
	)

cop2_put() [20/29]

cop2_put	(	26	,
		-	20000
	)

cop2_put() [21/29]

cop2_put	(	27	,
		-	30000
	)

cop2_put() [22/29]

cop2_put	(	6	,
		0x00808080
	)

cop2_put() [23/29]

cop2_put	(	6	,
		0x00ffffff
	)

cop2_put() [24/29]

cop2_put	(	8	,
		0x0800
	)

cop2_put() [25/29]

cop2_put	(	8	,
		0x1000
	)

cop2_put() [26/29]

cop2_put	(	9	,
		0x0ff0
	)

cop2_put() [27/29]

cop2_put	(	9	,
		0x7fff
	)

cop2_put() [28/29]

cop2_put	(	9	,
		0xffff8000
	)

cop2_put() [29/29]

cop2_put	(	9	,
		100
	)

cop2_putc() [1/13]

cop2_putc	(	0	,
		0
	)

cop2_putc() [2/13]

cop2_putc	(	1	,
		0
	)

cop2_putc() [3/13]

cop2_putc	(	2	,
		0
	)

cop2_putc() [4/13]

cop2_putc	(	24	,
		0
	)

cop2_putc() [5/13]

cop2_putc	(	24	,
		0x400<<	16
	)

cop2_putc() [6/13]

cop2_putc	(	25	,
		0
	)

cop2_putc() [7/13]

cop2_putc	(	26	,
		0
	)

cop2_putc() [8/13]

cop2_putc	(	26	,
		200
	)

cop2_putc() [9/13]

cop2_putc	(	27	,
		0
	)

cop2_putc() [10/13]

cop2_putc	(	28	,
		0
	)

cop2_putc() [11/13]

cop2_putc	(	28	,
		0x1000000
	)

cop2_putc() [12/13]

cop2_putc	(	3	,
		0
	)

cop2_putc() [13/13]

cop2_putc	(	4	,
		0
	)

gte_clear_flag()

gte_clear_flag

(

)

gte_set_far_color()

gte_set_far_color	(	0	,
		0	,
		0
	)

gte_set_identity_rotation()

gte_set_identity_rotation

(

)

gte_set_screen() [1/3]

gte_set_screen	(	0	,
		0	,
		0
	)

gte_set_screen() [2/3]

gte_set_screen	(	0	,
		0	,
		200
	)

gte_set_screen() [3/3]

gte_set_screen	(	160<<	16,
		120<<	16,
		200
	)

gte_set_translation() [1/3]

gte_set_translation	(	0	,
		0	,
		-	1000
	)

gte_set_translation() [2/3]

gte_set_translation	(	0	,
		0	,
		0
	)

gte_set_translation() [3/3]

gte_set_translation	(	100	,
		200	,
		300
	)

ramsyscall_printf()

ramsyscall_printf

(

)

Variable Documentation

f12

uint32_t f12 = (flag >> 12) & 1

f14

uint32_t f14 = (flag >> 14) & 1

f17

uint32_t f17 = (flag >> 17) & 1

f18

uint32_t f18 = (flag >> 18) & 1

f21_255

uint32_t f21_255 = (flag >> 21) & 1

f21_neg

uint32_t f21_neg = (flag >> 21) & 1

f24

uint32_t f24 = (flag >> 24) & 1

flag

uint32_t flag = gte_read_flag()

gte_tests

gte_tests

ir0

uint32_t ir0

ir1

uint32_t ir1

mac0

int32_t mac0

mac1

int32_t mac1

mac2

int32_t mac2

mac3

int32_t mac3

r_255

uint32_t r_255 = rgb2 & 0xff

r_neg

uint32_t r_neg = rgb2 & 0xff

rgb2

uint32_t rgb2

sx

int16_t sx = (int16_t)(sxy2 & 0xffff)

sxy2

uint32_t sxy2

sz3

uint32_t sz3