38static void rasterDrawLineH(
void) {
40 rasterClearTestRegion(0, 0, 16, 16);
42 rasterFlushPrimitive();
46static void rasterDrawLineV(
void) {
48 rasterClearTestRegion(0, 0, 16, 16);
50 rasterFlushPrimitive();
54static void rasterDrawLineD45(
void) {
56 rasterClearTestRegion(0, 0, 16, 16);
58 rasterFlushPrimitive();
62static void rasterDrawLineDN45(
void) {
64 rasterClearTestRegion(0, 0, 16, 16);
66 rasterFlushPrimitive();
70static void rasterDrawLineZero(
void) {
72 rasterClearTestRegion(16, 16, 16, 8);
74 rasterFlushPrimitive();
79static void rasterDrawLineShallow(
void) {
81 rasterClearTestRegion(0, 0, 16, 8);
83 rasterFlushPrimitive();
92CESTER_TEST(lineH_before_start_pixel_4_10, gpu_raster_phase2,
97CESTER_TEST(lineH_start_pixel_5_10, gpu_raster_phase2,
102CESTER_TEST(lineH_interior_pixel_7_10, gpu_raster_phase2,
107CESTER_TEST(lineH_end_pixel_10_10_inclusive, gpu_raster_phase2,
112CESTER_TEST(lineH_past_end_pixel_11_10, gpu_raster_phase2,
117CESTER_TEST(lineH_below_line_pixel_5_11, gpu_raster_phase2,
126CESTER_TEST(lineV_before_start_pixel_10_4, gpu_raster_phase2,
131CESTER_TEST(lineV_start_pixel_10_5, gpu_raster_phase2,
136CESTER_TEST(lineV_interior_pixel_10_7, gpu_raster_phase2,
141CESTER_TEST(lineV_end_pixel_10_10_inclusive, gpu_raster_phase2,
146CESTER_TEST(lineV_past_end_pixel_10_11, gpu_raster_phase2,
155CESTER_TEST(lineD45_start_pixel_5_5, gpu_raster_phase2,
160CESTER_TEST(lineD45_interior_pixel_7_7, gpu_raster_phase2,
165CESTER_TEST(lineD45_end_pixel_10_10, gpu_raster_phase2,
170CESTER_TEST(lineD45_off_diag_pixel_5_6, gpu_raster_phase2,
175CESTER_TEST(lineD45_off_diag_pixel_6_5, gpu_raster_phase2,
184CESTER_TEST(lineDN45_start_pixel_5_10, gpu_raster_phase2,
185 rasterDrawLineDN45();
189CESTER_TEST(lineDN45_interior_pixel_7_8, gpu_raster_phase2,
190 rasterDrawLineDN45();
194CESTER_TEST(lineDN45_end_pixel_10_5, gpu_raster_phase2,
195 rasterDrawLineDN45();
203CESTER_TEST(lineZero_start_pixel_20_20, gpu_raster_phase2,
204 rasterDrawLineZero();
208CESTER_TEST(lineZero_neighbor_pixel_21_20, gpu_raster_phase2,
209 rasterDrawLineZero();
217CESTER_TEST(lineShallow_start_pixel_0_0, gpu_raster_phase2,
218 rasterDrawLineShallow();
222CESTER_TEST(lineShallow_midpoint_pixel_5_2, gpu_raster_phase2,
223 rasterDrawLineShallow();
227CESTER_TEST(lineShallow_end_pixel_10_3, gpu_raster_phase2,
228 rasterDrawLineShallow();
232CESTER_TEST(lineShallow_x_2_y_0_bresenham_choice, gpu_raster_phase2,
233 rasterDrawLineShallow();
CESTER_BODY(static int s_got40;static int s_got80;static uint32_t s_cause;static uint32_t s_epc;static uint32_t s_from;static uint32_t *s_resume;static uint32_t *s_regs;static uint32_t(*s_customhandler)()=NULL;static uint32_t s_oldIMASK;static uint32_t s_oldDPCR;static uint32_t s_oldDICR;uint32_t handler(uint32_t *regs, uint32_t from) { if(from==0x40) s_got40=1;if(from==0x80) s_got80=1;uint32_t cause;uint32_t epc;s_from=from;asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" :"=r"(cause), "=r"(epc));s_cause=cause;s_epc=epc;if(s_customhandler) { return s_customhandler();} else { return s_resume ?((uint32_t) s_resume) :(epc+4);} } void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from));void uninstallExceptionHandlers();uint32_t branchbranch1();uint32_t branchbranch2();uint32_t jumpjump1();uint32_t jumpjump2();uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);uint32_t linkandload();uint32_t lwandlink();uint32_t nolink();static int s_interruptsWereEnabled;) CESTER_BEFORE_EACH(cpu_tests
CESTER_TEST(cpu_cop0_basic_write_bp, cpu_tests, uint32_t expectedEPC;uint32_t t;volatile uint32_t *ptr=(volatile uint32_t *) 0x58; *ptr=1;__asm__ volatile("" " lui %0, 0b1100101010000000\n" " mtc0 %0, $7\n" " li %0, 0x58\n" " mtc0 %0, $5\n" " li %0, 0xfffffff0\n" " mtc0 %0, $9\n" :"=r"(t));cester_assert_uint_eq(1, *ptr);__asm__ volatile("la %0, 1f\n1:\nsw $0, 0x58($0)" :"=r"(expectedEPC));__asm__ volatile("mtc0 $0, $7\n");cester_assert_uint_eq(0, *ptr);cester_assert_uint_eq(1, s_got40);cester_assert_uint_eq(0, s_got80);cester_assert_uint_eq(0x40, s_from);cester_assert_uint_eq(expectedEPC, s_epc);) CESTER_TEST(cpu_cop0_kseg_write_bp
#define EXPECT_LINE_ZERO_PIXEL_20_20
Definition raster-expected-phase2.h:77
#define EXPECT_LINE_H_PIXEL_5_11
Definition raster-expected-phase2.h:53
#define EXPECT_LINE_D45_PIXEL_7_7
Definition raster-expected-phase2.h:65
#define EXPECT_LINE_H_PIXEL_4_10
Definition raster-expected-phase2.h:48
#define EXPECT_LINE_ZERO_PIXEL_21_20
Definition raster-expected-phase2.h:78
#define EXPECT_LINE_V_PIXEL_10_5
Definition raster-expected-phase2.h:57
#define EXPECT_LINE_H_PIXEL_11_10
Definition raster-expected-phase2.h:52
#define EXPECT_LINE_SHALLOW_PIXEL_2_0
Definition raster-expected-phase2.h:88
#define EXPECT_LINE_V_PIXEL_10_4
Definition raster-expected-phase2.h:56
#define EXPECT_LINE_SHALLOW_PIXEL_5_2
Definition raster-expected-phase2.h:86
#define EXPECT_LINE_V_PIXEL_10_11
Definition raster-expected-phase2.h:60
#define EXPECT_LINE_V_PIXEL_10_10
Definition raster-expected-phase2.h:59
#define EXPECT_LINE_DN45_PIXEL_10_5
Definition raster-expected-phase2.h:73
#define EXPECT_LINE_H_PIXEL_7_10
Definition raster-expected-phase2.h:50
#define EXPECT_LINE_D45_PIXEL_6_5
Definition raster-expected-phase2.h:68
#define EXPECT_LINE_H_PIXEL_10_10
Definition raster-expected-phase2.h:51
#define EXPECT_LINE_SHALLOW_PIXEL_0_0
Definition raster-expected-phase2.h:85
#define EXPECT_LINE_D45_PIXEL_5_5
Definition raster-expected-phase2.h:64
#define EXPECT_LINE_H_PIXEL_5_10
Definition raster-expected-phase2.h:49
#define EXPECT_LINE_D45_PIXEL_5_6
Definition raster-expected-phase2.h:67
#define EXPECT_LINE_DN45_PIXEL_5_10
Definition raster-expected-phase2.h:71
#define EXPECT_LINE_SHALLOW_PIXEL_10_3
Definition raster-expected-phase2.h:87
#define EXPECT_LINE_V_PIXEL_10_7
Definition raster-expected-phase2.h:58
#define EXPECT_LINE_DN45_PIXEL_7_8
Definition raster-expected-phase2.h:72
#define EXPECT_LINE_D45_PIXEL_10_10
Definition raster-expected-phase2.h:66
#define RASTER_CMD_BLUE
Definition raster-helpers.h:127
#define RASTER_CMD_RED
Definition raster-helpers.h:123
#define RASTER_CMD_WHITE
Definition raster-helpers.h:129
#define RASTER_CMD_GREEN
Definition raster-helpers.h:125
#define ASSERT_PIXEL_EQ(expected, x_, y_)
Definition raster-helpers.h:472