#include "raster-helpers.h"
#include "texture-fixtures.h"

Include dependency graph for raster-expected-phase8.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	QFA4_0_0 0x03e0u /* CLUT4[0] = vram555(0, 31, 0) */

#define	QFA4_14_0 0x022eu /* CLUT4[14] = vram555(14, 17, 0) */

#define	QFA4_0_6 0x03e0u

#define	QFA4_14_6 0x022eu

#define	QFA4_7_3 0x0307u /* CLUT4[7] = vram555(7, 24, 0) */

#define	QFA4_3_5 0x0383u /* CLUT4[3] = vram555(3, 28, 0) */

#define	QFA8_0_0 0x03e0u /* CLUT8[0] = vram555(0, 31, 0) */

#define	QFA8_30_0 0x003eu /* CLUT8[30] = vram555(30, 1, 0) */

#define	QFA8_0_6 0x03e0u

#define	QFA8_30_6 0x003eu

#define	QFA8_15_3 0x020fu /* CLUT8[15] = vram555(15, 16, 0) */

#define	QFA8_22_5 0x0136u /* CLUT8[22] = vram555(22, 9, 0) */

#define	QFA15_0_0 RASTER_SENTINEL /* top-left vertex excluded */

#define	QFA15_14_0 0x380eu /* vram555(14, 0, 14) */

#define	QFA15_0_6 0x18c0u /* vram555(0, 6, 6) */

#define	QFA15_14_6 0x50ceu /* vram555(14, 6, 20) - blue=20 overflows 5-bit at bit 14 */

#define	QFA15_7_3 0x2867u /* vram555(7, 3, 10) */

#define	QFA15_3_5 0x20a3u /* vram555(3, 5, 8) */

#define	QFD4_0_0 0x03e0u

#define	QFD4_8_0 0x02e8u

#define	QFD4_4_3 0x03a2u

#define	QFD4_10_3 0x02e8u

#define	QFD4_4_6 0x03c1u

#define	QFD4_14_6 0x028bu

#define	QFD4_4_1 0x0383u /* leftX=0.571; HW U=3 (pass row) */

#define	QFD4_10_1 0x02c9u /* HW U=9 (pass row) */

#define	QFD4_4_2 0x0383u /* leftX=1.143; HW U=3, Redux U=2 (drift) */

#define	QFD4_10_2 0x02c9u /* HW U=9, Redux U=8 (drift) */

#define	QFD4_4_4 0x03a2u /* leftX=2.286; HW U=2, Redux U=1 (drift) */

#define	QFD4_10_4 0x02e8u /* HW U=8, Redux U=7 (drift) */

#define	QFD4_4_5 0x03c1u /* leftX=2.857; HW U=1 (pass row) */

#define	QFD4_10_5 0x0307u /* HW U=7 (pass row) */

#define	QFD15_0_0 RASTER_SENTINEL /* apex excluded by top-left */

#define	QFD15_8_0 0x2008u

#define	QFD15_4_3 0x1462u

#define	QFD15_10_3 0x2c68u

#define	QFD15_4_6 0x1cc1u

#define	QFD15_14_6 0x44cbu

#define	QFD15_4_1 0x1023u /* HW u=3 v=1 (pass row) */

#define	QFD15_10_1 0x2829u /* HW u=9 v=1 (pass row) */

#define	QFD15_4_2 0x1443u /* HW u=3 v=2 (drift) */

#define	QFD15_10_2 0x2c49u /* HW u=9 v=2 (drift) */

#define	QFD15_4_4 0x1882u /* HW u=2 v=4 (drift) */

#define	QFD15_10_4 0x3088u /* HW u=8 v=4 (drift) */

#define	QFD15_4_5 0x18a1u /* HW u=1 v=5 (pass row) */

#define	QFD15_10_5 0x30a7u /* HW u=7 v=5 (pass row) */

#define	QFO4_TERMINAL_4_0 RASTER_SENTINEL

#define	QFO4_TERMINAL_4_1 RASTER_SENTINEL

#define	QFO4_TERMINAL_4_2 RASTER_SENTINEL

#define	QFO4_INTERIOR_2_1 0x03a2u /* CLUT4[2] = vram555(2, 29, 0) */

#define	QFO4_INTERIOR_3_2 0x0383u /* CLUT4[3] = vram555(3, 28, 0) */

#define	QFO8_TERMINAL_4_0 RASTER_SENTINEL

#define	QFO8_TERMINAL_4_1 RASTER_SENTINEL

#define	QFO8_TERMINAL_4_2 RASTER_SENTINEL

#define	QFO8_INTERIOR_2_1 0x03a2u /* CLUT8[2] = vram555(2, 29, 0) */

#define	QFO15_TERMINAL_4_0 RASTER_SENTINEL

#define	QFO15_TERMINAL_4_1 RASTER_SENTINEL

#define	QFO15_TERMINAL_4_2 RASTER_SENTINEL

#define	QFO15_INTERIOR_2_1 0x0c22u /* vram555(2, 1, 3) */

#define	QFS4_0_0 0x03e0u /* same as QFA4_0_0 - no blend */

#define	QFS4_7_3 0x0307u /* same as QFA4_7_3 */

#define	QFS4_14_6 0x022eu /* same as QFA4_14_6 */

#define	QFS8_0_0 0x03e0u /* same as QFA8_0_0 */

#define	QFS8_15_3 0x020fu /* same as QFA8_15_3 */

#define	QFS8_30_6 0x003eu /* same as QFA8_30_6 */

#define	QFDEG_0_0 0x03e0u

#define	QFDEG_7_3 0x0307u

#define	QFDEG_3_5 0x0383u

#define	QFDEG_REF_0_0 QFDEG_0_0 /* 3-vert ref matches 4-vert degenerate */

#define	QFDEG_REF_7_3 QFDEG_7_3

#define	QFDEG_REF_3_5 QFDEG_3_5

Macro Definition Documentation

◆ QFA15_0_0

#define QFA15_0_0 RASTER_SENTINEL /* top-left vertex excluded */

◆ QFA15_0_6

#define QFA15_0_6 0x18c0u /* vram555(0, 6, 6) */

◆ QFA15_14_0

#define QFA15_14_0 0x380eu /* vram555(14, 0, 14) */

◆ QFA15_14_6

#define QFA15_14_6 0x50ceu /* vram555(14, 6, 20) - blue=20 overflows 5-bit at bit 14 */

◆ QFA15_3_5

#define QFA15_3_5 0x20a3u /* vram555(3, 5, 8) */

◆ QFA15_7_3

#define QFA15_7_3 0x2867u /* vram555(7, 3, 10) */

◆ QFA4_0_0

#define QFA4_0_0 0x03e0u /* CLUT4[0] = vram555(0, 31, 0) */

◆ QFA4_0_6

#define QFA4_0_6 0x03e0u

◆ QFA4_14_0

#define QFA4_14_0 0x022eu /* CLUT4[14] = vram555(14, 17, 0) */

◆ QFA4_14_6

#define QFA4_14_6 0x022eu

◆ QFA4_3_5

#define QFA4_3_5 0x0383u /* CLUT4[3] = vram555(3, 28, 0) */

◆ QFA4_7_3

#define QFA4_7_3 0x0307u /* CLUT4[7] = vram555(7, 24, 0) */

◆ QFA8_0_0

#define QFA8_0_0 0x03e0u /* CLUT8[0] = vram555(0, 31, 0) */

◆ QFA8_0_6

#define QFA8_0_6 0x03e0u

◆ QFA8_15_3

#define QFA8_15_3 0x020fu /* CLUT8[15] = vram555(15, 16, 0) */

◆ QFA8_22_5

#define QFA8_22_5 0x0136u /* CLUT8[22] = vram555(22, 9, 0) */

◆ QFA8_30_0

#define QFA8_30_0 0x003eu /* CLUT8[30] = vram555(30, 1, 0) */

◆ QFA8_30_6

#define QFA8_30_6 0x003eu

◆ QFD15_0_0

#define QFD15_0_0 RASTER_SENTINEL /* apex excluded by top-left */

◆ QFD15_10_1

#define QFD15_10_1 0x2829u /* HW u=9 v=1 (pass row) */

◆ QFD15_10_2

#define QFD15_10_2 0x2c49u /* HW u=9 v=2 (drift) */

◆ QFD15_10_3

#define QFD15_10_3 0x2c68u

◆ QFD15_10_4

#define QFD15_10_4 0x3088u /* HW u=8 v=4 (drift) */

◆ QFD15_10_5

#define QFD15_10_5 0x30a7u /* HW u=7 v=5 (pass row) */

◆ QFD15_14_6

#define QFD15_14_6 0x44cbu

◆ QFD15_4_1

#define QFD15_4_1 0x1023u /* HW u=3 v=1 (pass row) */

◆ QFD15_4_2

#define QFD15_4_2 0x1443u /* HW u=3 v=2 (drift) */

◆ QFD15_4_3

#define QFD15_4_3 0x1462u

◆ QFD15_4_4

#define QFD15_4_4 0x1882u /* HW u=2 v=4 (drift) */

◆ QFD15_4_5

#define QFD15_4_5 0x18a1u /* HW u=1 v=5 (pass row) */

◆ QFD15_4_6

#define QFD15_4_6 0x1cc1u

◆ QFD15_8_0

#define QFD15_8_0 0x2008u

◆ QFD4_0_0

#define QFD4_0_0 0x03e0u

◆ QFD4_10_1

#define QFD4_10_1 0x02c9u /* HW U=9 (pass row) */

◆ QFD4_10_2

#define QFD4_10_2 0x02c9u /* HW U=9, Redux U=8 (drift) */

◆ QFD4_10_3

#define QFD4_10_3 0x02e8u

◆ QFD4_10_4

#define QFD4_10_4 0x02e8u /* HW U=8, Redux U=7 (drift) */

◆ QFD4_10_5

#define QFD4_10_5 0x0307u /* HW U=7 (pass row) */

◆ QFD4_14_6

#define QFD4_14_6 0x028bu

◆ QFD4_4_1

#define QFD4_4_1 0x0383u /* leftX=0.571; HW U=3 (pass row) */

◆ QFD4_4_2

#define QFD4_4_2 0x0383u /* leftX=1.143; HW U=3, Redux U=2 (drift) */

◆ QFD4_4_3

#define QFD4_4_3 0x03a2u

◆ QFD4_4_4

#define QFD4_4_4 0x03a2u /* leftX=2.286; HW U=2, Redux U=1 (drift) */

◆ QFD4_4_5

#define QFD4_4_5 0x03c1u /* leftX=2.857; HW U=1 (pass row) */

◆ QFD4_4_6

#define QFD4_4_6 0x03c1u

◆ QFD4_8_0

#define QFD4_8_0 0x02e8u

◆ QFDEG_0_0

#define QFDEG_0_0 0x03e0u

◆ QFDEG_3_5

#define QFDEG_3_5 0x0383u

◆ QFDEG_7_3

#define QFDEG_7_3 0x0307u

◆ QFDEG_REF_0_0

#define QFDEG_REF_0_0 QFDEG_0_0 /* 3-vert ref matches 4-vert degenerate */

◆ QFDEG_REF_3_5

#define QFDEG_REF_3_5 QFDEG_3_5

◆ QFDEG_REF_7_3

#define QFDEG_REF_7_3 QFDEG_7_3

◆ QFO15_INTERIOR_2_1

#define QFO15_INTERIOR_2_1 0x0c22u /* vram555(2, 1, 3) */

◆ QFO15_TERMINAL_4_0

#define QFO15_TERMINAL_4_0 RASTER_SENTINEL

◆ QFO15_TERMINAL_4_1

#define QFO15_TERMINAL_4_1 RASTER_SENTINEL

◆ QFO15_TERMINAL_4_2

#define QFO15_TERMINAL_4_2 RASTER_SENTINEL

◆ QFO4_INTERIOR_2_1

#define QFO4_INTERIOR_2_1 0x03a2u /* CLUT4[2] = vram555(2, 29, 0) */

◆ QFO4_INTERIOR_3_2

#define QFO4_INTERIOR_3_2 0x0383u /* CLUT4[3] = vram555(3, 28, 0) */

◆ QFO4_TERMINAL_4_0

#define QFO4_TERMINAL_4_0 RASTER_SENTINEL

◆ QFO4_TERMINAL_4_1

#define QFO4_TERMINAL_4_1 RASTER_SENTINEL

◆ QFO4_TERMINAL_4_2

#define QFO4_TERMINAL_4_2 RASTER_SENTINEL

◆ QFO8_INTERIOR_2_1

#define QFO8_INTERIOR_2_1 0x03a2u /* CLUT8[2] = vram555(2, 29, 0) */

◆ QFO8_TERMINAL_4_0

#define QFO8_TERMINAL_4_0 RASTER_SENTINEL

◆ QFO8_TERMINAL_4_1

#define QFO8_TERMINAL_4_1 RASTER_SENTINEL

◆ QFO8_TERMINAL_4_2

#define QFO8_TERMINAL_4_2 RASTER_SENTINEL

◆ QFS4_0_0

#define QFS4_0_0 0x03e0u /* same as QFA4_0_0 - no blend */

◆ QFS4_14_6

#define QFS4_14_6 0x022eu /* same as QFA4_14_6 */

◆ QFS4_7_3

#define QFS4_7_3 0x0307u /* same as QFA4_7_3 */

◆ QFS8_0_0

#define QFS8_0_0 0x03e0u /* same as QFA8_0_0 */

◆ QFS8_15_3

#define QFS8_15_3 0x020fu /* same as QFA8_15_3 */

◆ QFS8_30_6

#define QFS8_30_6 0x003eu /* same as QFA8_30_6 */

Macros