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spu-adpcm-edge.c File Reference
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Macros

#define SPU_ADPCM_EDGE_GOLDENS_AVAILABLE   0
 
#define SPU_ADPCM_EDGE_EXPECTED_REPEAT_LOOP_START   0x212u
 
#define SPU_ADPCM_EDGE_EXPECTED_REPEAT_END_MUTE   0x210u
 
#define SPU_ADPCM_EDGE_EXPECTED_ENDX_END_MUTE   0x1u
 
#define SPU_ADPCM_EDGE_EXPECTED_ENVX_END_MUTE   0x0u
 
#define SPU_ADPCM_EDGE_EXPECTED_ENDX_END_REPEAT   0x1u
 
#define SPU_ADPCM_EDGE_EXPECTED_ENVX_END_REPEAT   0x3fffu
 
#define SPU_ENDX_LOW   HW_U16(0x1f801d9c)
 
#define SPU_ADPCM_EDGE_ASSERT_GOLDEN(name)   spu_adpcm_edge_observe(#name)
 
#define SPU_ADPCM_EDGE_TEST_PREDICTOR(N)
 

Functions

 CESTER_BODY (static const uint8_t kEdgeZero[14]={ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, };static const uint8_t kEdgePositive[14]={ 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, };static const uint8_t kEdgeNegative[14]={ 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, };static const uint8_t kEdgeAlternating[14]={ 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, };static const uint8_t kEdgeRamp[14]={ 0x10, 0x32, 0x54, 0x76, 0x56, 0x34, 0x12, 0xe0, 0xcd, 0xab, 0x89, 0xa9, 0xcb, 0xed, };static const uint8_t kEdgeMixed[14]={ 0x17, 0xde, 0x9a, 0xbc, 0x45, 0x23, 0x01, 0xfe, 0xdc, 0xba, 0x98, 0x89, 0x67, 0x45, };static void spu_adpcm_edge_block(uint8_t *sample, int block, uint8_t header, uint8_t flags, const uint8_t *payload) { uint8_t *p=sample+block *16;p[0]=header;p[1]=flags;for(int i=0;i< 14;i++) p[2+i]=payload[i];} static uint32_t spu_adpcm_edge_hash_capture(void) { uint32_t h=2166136261u;for(int i=0;i< 512;i++) { h ^=(uint16_t) s_capture[i];h *=16777619u;} return h;} static void spu_adpcm_edge_observe(const char *name) { int16_t min=(int16_t) s_capture[0];int16_t max=(int16_t) s_capture[0];for(int i=1;i< 512;i++) { int16_t v=(int16_t) s_capture[i];if(v< min) min=v;if(v > max) max=v;} ramsyscall_printf("OBS spu_adpcm_edge golden %s.test.pcm hash=0x%08x first=0x%04x mid=0x%04x last=0x%04x min=0x%04x max=0x%04x\n", name, spu_adpcm_edge_hash_capture(), s_capture[0], s_capture[256], s_capture[511],(uint16_t) min,(uint16_t) max);} static void spu_adpcm_edge_expect_u32(const char *name, uint32_t expected, uint32_t got) { if(expected==0xffffffffu) { ramsyscall_printf("OBS spu_adpcm_edge expected %s=0x%08x\n", name, got);} else { cester_assert_uint_eq(expected, got);} } static void spu_adpcm_edge_run_capture_keep_on(const uint8_t *sample64, uint16_t pitch) { spu_reset_quiet();for(int i=0;i< 64;i++) s_upload[i]=sample64[i];for(int i=64;i< 128;i++) s_upload[i]=0xaa;spu_write_sync(SPU_UPLOAD_ADDR, s_upload, 128);SPU_CTRL=0x8000|0x4000;SPU_VOL_MAIN_LEFT=0x3fff;SPU_VOL_MAIN_RIGHT=0x3fff;SPU_KEY_OFF_LOW=0xffff;SPU_KEY_OFF_HIGH=0xffff;spu_busy_wait(800000);spu_wait_status_bit11_flip();spu_voice1_keyon(SPU_UPLOAD_ADDR, pitch);spu_wait_status_bit11_flip();spu_read_sync(0x0800, s_capture, 1024);} static void spu_adpcm_edge_stop(void) { SPU_KEY_OFF_LOW=0xffff;SPU_KEY_OFF_HIGH=0xffff;muteSpu();}) CESTER_TEST(adpcm_edge_shift_00_03
 
 spu_adpcm_edge_block (sample, 0, 0x00, 0x04, kEdgeAlternating)
 
 spu_adpcm_edge_block (sample, 1, 0x01, 0x00, kEdgeAlternating)
 
 spu_adpcm_edge_block (sample, 2, 0x02, 0x00, kEdgeAlternating)
 
 spu_adpcm_edge_block (sample, 3, 0x03, 0x03, kEdgeAlternating)
 
 run_voice1_with_sample (sample, 0x1000)
 
 SPU_ADPCM_EDGE_ASSERT_GOLDEN (adpcm_edge_shift_00_03)
 

Variables

 spu_tests
 
uint8_t sample [64]
 

Macro Definition Documentation

◆ SPU_ADPCM_EDGE_ASSERT_GOLDEN

#define SPU_ADPCM_EDGE_ASSERT_GOLDEN (   name)    spu_adpcm_edge_observe(#name)

◆ SPU_ADPCM_EDGE_EXPECTED_ENDX_END_MUTE

#define SPU_ADPCM_EDGE_EXPECTED_ENDX_END_MUTE   0x1u

◆ SPU_ADPCM_EDGE_EXPECTED_ENDX_END_REPEAT

#define SPU_ADPCM_EDGE_EXPECTED_ENDX_END_REPEAT   0x1u

◆ SPU_ADPCM_EDGE_EXPECTED_ENVX_END_MUTE

#define SPU_ADPCM_EDGE_EXPECTED_ENVX_END_MUTE   0x0u

◆ SPU_ADPCM_EDGE_EXPECTED_ENVX_END_REPEAT

#define SPU_ADPCM_EDGE_EXPECTED_ENVX_END_REPEAT   0x3fffu

◆ SPU_ADPCM_EDGE_EXPECTED_REPEAT_END_MUTE

#define SPU_ADPCM_EDGE_EXPECTED_REPEAT_END_MUTE   0x210u

◆ SPU_ADPCM_EDGE_EXPECTED_REPEAT_LOOP_START

#define SPU_ADPCM_EDGE_EXPECTED_REPEAT_LOOP_START   0x212u

◆ SPU_ADPCM_EDGE_GOLDENS_AVAILABLE

#define SPU_ADPCM_EDGE_GOLDENS_AVAILABLE   0

◆ SPU_ADPCM_EDGE_TEST_PREDICTOR

#define SPU_ADPCM_EDGE_TEST_PREDICTOR (   N)
Value:
CESTER_TEST(adpcm_edge_predictor_##N, spu_tests, \
uint8_t sample[64]; \
spu_adpcm_edge_block(sample, 0, ((N) << 4) | 4, 0x04, kEdgeMixed); \
spu_adpcm_edge_block(sample, 1, ((N) << 4) | 4, 0x00, kEdgeRamp); \
spu_adpcm_edge_block(sample, 2, ((N) << 4) | 4, 0x00, kEdgeZero); \
spu_adpcm_edge_block(sample, 3, ((N) << 4) | 4, 0x03, kEdgeAlternating); \
run_voice1_with_sample(sample, 0x1000); \
SPU_ADPCM_EDGE_ASSERT_GOLDEN(adpcm_edge_predictor_##N); \
)
CESTER_TEST
CESTER_TEST(cdlGetLocL, test_instances, int resetDone=resetCDRom();if(!resetDone) { cester_assert_true(resetDone);return;} initializeTime();CDROM_REG0=0;CDROM_REG1=CDL_GETLOCL;uint32_t ackTime=waitCDRomIRQ();uint8_t cause1=ackCDRomCause();uint8_t ctrl1=CDROM_REG0 &~3;uint8_t response[16];uint8_t responseSize=readResponse(response);uint8_t ctrl2=CDROM_REG0 &~3;CDROM_REG0=1;uint8_t cause1b=CDROM_REG3_UC;cester_assert_uint_eq(3, cause1);cester_assert_uint_eq(0xe0, cause1b);cester_assert_uint_eq(0x38, ctrl1);cester_assert_uint_eq(0x18, ctrl2);cester_assert_uint_eq(8, responseSize);cester_assert_uint_ge(ackTime, 500);cester_assert_uint_lt(ackTime, 7000);ramsyscall_printf("Basic getlocL, ack in %ius\n", ackTime);) CESTER_TEST(cdlGetLocLafterSeekP
N
#define N
Definition main.c:37
sample
uint8_t sample[64]
Definition spu-adpcm-edge.c:190
spu_tests
spu_tests
Definition spu-adpcm-edge.c:189

◆ SPU_ENDX_LOW

#define SPU_ENDX_LOW   HW_U16(0x1f801d9c)

Function Documentation

◆ CESTER_BODY()

CESTER_BODY ( static const uint8_t  kEdgeZero[14] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; static const uint8_t kEdgePositive[14] = { 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, }; static const uint8_t kEdgeNegative[14] = { 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, }; static const uint8_t kEdgeAlternating[14] = { 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, }; static const uint8_t kEdgeRamp[14] = { 0x10, 0x32, 0x54, 0x76, 0x56, 0x34, 0x12, 0xe0, 0xcd, 0xab, 0x89, 0xa9, 0xcb, 0xed, }; static const uint8_t kEdgeMixed[14] = { 0x17, 0xde, 0x9a, 0xbc, 0x45, 0x23, 0x01, 0xfe, 0xdc, 0xba, 0x98, 0x89, 0x67, 0x45, }; static void spu_adpcm_edge_block(uint8_t *sample, int block, uint8_t header,                                 uint8_t flags, const uint8_t *payload) { uint8_t *p = sample + block * 16; p[0] = header; p[1] = flags; for (int i = 0; i < 14; i++) p[2 + i] = payload[i]; } static uint32_t spu_adpcm_edge_hash_capture(void) { uint32_t h = 2166136261u; for (int i = 0; i < 512; i++) { h ^= (uint16_t)s_capture[i]; h *= 16777619u; } return h; } static void spu_adpcm_edge_observe(const char *name) { int16_t min = (int16_t)s_capture[0]; int16_t max = (int16_t)s_capture[0]; for (int i = 1; i < 512; i++) { int16_t v = (int16_t)s_capture[i]; if (v < min) min = v; if (v > max) max = v; } ramsyscall_printf("OBS spu_adpcm_edge golden %s.test.pcm hash=0x%08x first=0x%04x mid=0x%04x last=0x%04x min=0x%04x max=0x%04x\n",                      name, spu_adpcm_edge_hash_capture(), s_capture[0],                      s_capture[256], s_capture[511], (uint16_t)min,                      (uint16_t)max); } static void spu_adpcm_edge_expect_u32(const char *name, uint32_t expected,                                      uint32_t got) { if (expected == 0xffffffffu) { ramsyscall_printf("OBS spu_adpcm_edge expected %s=0x%08x\n", name, got); } else { cester_assert_uint_eq(expected, got); } } static void spu_adpcm_edge_run_capture_keep_on(const uint8_t *sample64,                                               uint16_t pitch) { spu_reset_quiet(); for (int i = 0; i < 64; i++) s_upload[i] = sample64[i]; for (int i = 64; i < 128; i++) s_upload[i] = 0xaa; spu_write_sync(SPU_UPLOAD_ADDR, s_upload, 128); SPU_CTRL = 0x8000 | 0x4000; SPU_VOL_MAIN_LEFT = 0x3fff; SPU_VOL_MAIN_RIGHT = 0x3fff; SPU_KEY_OFF_LOW = 0xffff; SPU_KEY_OFF_HIGH = 0xffff; spu_busy_wait(800000); spu_wait_status_bit11_flip(); spu_voice1_keyon(SPU_UPLOAD_ADDR, pitch); spu_wait_status_bit11_flip(); spu_read_sync(0x0800, s_capture, 1024); } static void spu_adpcm_edge_stop(void) { SPU_KEY_OFF_LOW = 0xffff; SPU_KEY_OFF_HIGH = 0xffff; muteSpu(); })

◆ run_voice1_with_sample()

run_voice1_with_sample ( sample  ,
0x1000   
)

◆ SPU_ADPCM_EDGE_ASSERT_GOLDEN()

SPU_ADPCM_EDGE_ASSERT_GOLDEN ( adpcm_edge_shift_00_03  )

◆ spu_adpcm_edge_block() [1/4]

spu_adpcm_edge_block ( sample  ,
0  ,
0x00  ,
0x04  ,
kEdgeAlternating   
)

◆ spu_adpcm_edge_block() [2/4]

spu_adpcm_edge_block ( sample  ,
1  ,
0x01  ,
0x00  ,
kEdgeAlternating   
)

◆ spu_adpcm_edge_block() [3/4]

spu_adpcm_edge_block ( sample  ,
2  ,
0x02  ,
0x00  ,
kEdgeAlternating   
)

◆ spu_adpcm_edge_block() [4/4]

spu_adpcm_edge_block ( sample  ,
3  ,
0x03  ,
0x03  ,
kEdgeAlternating   
)

Variable Documentation

◆ sample

uint8_t sample[64]

◆ spu_tests

spu_tests
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