41 cop2_put(12, (0xfc00 << 16) | 0x03ff);
42 cop2_put(13, (0x03ff << 16) | 0xfc00);
49 flag = gte_read_flag();
69 cop2_put(12, (0x7fff << 16) | 0x7fff);
70 cop2_put(13, (0x8000 << 16) | 0x8000);
71 cop2_put(14, (0x7fff << 16) | 0x8000);
77 flag = gte_read_flag();
CESTER_TEST(cpu_cop0_basic_write_bp, cpu_tests, uint32_t expectedEPC;uint32_t t;volatile uint32_t *ptr=(volatile uint32_t *) 0x58; *ptr=1;__asm__ volatile("" " lui %0, 0b1100101010000000\n" " mtc0 %0, $7\n" " li %0, 0x58\n" " mtc0 %0, $5\n" " li %0, 0xfffffff0\n" " mtc0 %0, $9\n" :"=r"(t));cester_assert_uint_eq(1, *ptr);__asm__ volatile("la %0, 1f\n1:\nsw $0, 0x58($0)" :"=r"(expectedEPC));__asm__ volatile("mtc0 $0, $7\n");cester_assert_uint_eq(0, *ptr);cester_assert_uint_eq(1, s_got40);cester_assert_uint_eq(0, s_got80);cester_assert_uint_eq(0x40, s_from);cester_assert_uint_eq(expectedEPC, s_epc);) CESTER_TEST(cpu_cop0_kseg_write_bp
cester_assert_uint_eq(1, *ptr)
#define cop2_cmd(op)
Definition cop2.h:175
#define cop2_put(reg, val)
Definition cop2.h:182
#define COP2_NCLIP
Definition cop2.h:133
#define cop2_get(reg, dest)
Definition cop2.h:189
cester_assert_int_eq(0, hi)
gte_tests
Definition gte-depthcue.c:29
ramsyscall_printf("DCPL: MAC=(%d,%d,%d) RGB2=0x%08x\n", mac1, mac2, mac3, rgb2)
uint32_t flag
Definition gte-edgecase.c:36
int32_t mac0
Definition gte-edgecase.c:149
void uint32_t(classId, spec)