42static void drawAR_AXIS_BASE(
void) {
44 rasterClearTestRegion(0, 0, 32, 16);
46 setTextureWindow(0, 0, 0, 0);
52 rasterFlushPrimitive();
59static void drawAR_COMPRESS(
void) {
61 rasterClearTestRegion(0, 0, 48, 16);
63 setTextureWindow(0, 0, 0, 0);
69 rasterFlushPrimitive();
76static void drawAR_STRETCH(
void) {
78 rasterClearTestRegion(0, 0, 16, 16);
80 setTextureWindow(0, 0, 0, 0);
86 rasterFlushPrimitive();
94static void drawAR_TWIST_90(
void) {
96 rasterClearTestRegion(0, 0, 24, 24);
98 setTextureWindow(0, 0, 0, 0);
104 rasterFlushPrimitive();
112static void drawAR_TWIST_45(
void) {
114 rasterClearTestRegion(0, 0, 24, 24);
116 setTextureWindow(0, 0, 0, 0);
122 rasterFlushPrimitive();
129static void drawAR_NATURAL(
void) {
131 rasterClearTestRegion(0, 0, 32, 24);
133 setTextureWindow(0, 0, 0, 0);
139 rasterFlushPrimitive();
146static void drawAR_NARROW_TALL(
void) {
148 rasterClearTestRegion(4, 0, 16, 28);
150 setTextureWindow(0, 0, 0, 0);
156 rasterFlushPrimitive();
163static void drawAR_FLAT_WIDE(
void) {
165 rasterClearTestRegion(0, 0, 48, 16);
167 setTextureWindow(0, 0, 0, 0);
173 rasterFlushPrimitive();
197CESTER_TEST(ar_axis_base_24_5_top_edge, gpu_raster_phase17,
202CESTER_TEST(ar_axis_base_25_5_right_vert_excluded, gpu_raster_phase17,
250CESTER_TEST(ar_stretch_5_5_a_vert, gpu_raster_phase17,
274CESTER_TEST(ar_twist_90_4_4_a_vert, gpu_raster_phase17,
283CESTER_TEST(ar_twist_45_12_4_ab_mid, gpu_raster_phase17,
288CESTER_TEST(ar_twist_45_4_12_ac_mid, gpu_raster_phase17,
298CESTER_TEST(ar_twist_45_12_12_bc_mid, gpu_raster_phase17,
322CESTER_TEST(ar_natural_5_5_a_vert, gpu_raster_phase17,
331CESTER_TEST(ar_narrow_tall_11_8, gpu_raster_phase17,
332 drawAR_NARROW_TALL();
336CESTER_TEST(ar_narrow_tall_12_14, gpu_raster_phase17,
337 drawAR_NARROW_TALL();
341CESTER_TEST(ar_narrow_tall_11_20, gpu_raster_phase17,
342 drawAR_NARROW_TALL();
346CESTER_TEST(ar_narrow_tall_13_6, gpu_raster_phase17,
347 drawAR_NARROW_TALL();
CESTER_BODY(static int s_got40;static int s_got80;static uint32_t s_cause;static uint32_t s_epc;static uint32_t s_from;static uint32_t *s_resume;static uint32_t *s_regs;static uint32_t(*s_customhandler)()=NULL;static uint32_t s_oldIMASK;static uint32_t s_oldDPCR;static uint32_t s_oldDICR;uint32_t handler(uint32_t *regs, uint32_t from) { if(from==0x40) s_got40=1;if(from==0x80) s_got80=1;uint32_t cause;uint32_t epc;s_from=from;asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" :"=r"(cause), "=r"(epc));s_cause=cause;s_epc=epc;if(s_customhandler) { return s_customhandler();} else { return s_resume ?((uint32_t) s_resume) :(epc+4);} } void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from));void uninstallExceptionHandlers();uint32_t branchbranch1();uint32_t branchbranch2();uint32_t jumpjump1();uint32_t jumpjump2();uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);uint32_t linkandload();uint32_t lwandlink();uint32_t nolink();static int s_interruptsWereEnabled;) CESTER_BEFORE_EACH(cpu_tests
CESTER_TEST(cpu_cop0_basic_write_bp, cpu_tests, uint32_t expectedEPC;uint32_t t;volatile uint32_t *ptr=(volatile uint32_t *) 0x58; *ptr=1;__asm__ volatile("" " lui %0, 0b1100101010000000\n" " mtc0 %0, $7\n" " li %0, 0x58\n" " mtc0 %0, $5\n" " li %0, 0xfffffff0\n" " mtc0 %0, $9\n" :"=r"(t));cester_assert_uint_eq(1, *ptr);__asm__ volatile("la %0, 1f\n1:\nsw $0, 0x58($0)" :"=r"(expectedEPC));__asm__ volatile("mtc0 $0, $7\n");cester_assert_uint_eq(0, *ptr);cester_assert_uint_eq(1, s_got40);cester_assert_uint_eq(0, s_got80);cester_assert_uint_eq(0x40, s_from);cester_assert_uint_eq(expectedEPC, s_epc);) CESTER_TEST(cpu_cop0_kseg_write_bp
#define EXPECT_AR_NARROW_TALL_11_20
Definition raster-expected-phase17.h:161
#define EXPECT_AR_STRETCH_8_8
Definition raster-expected-phase17.h:120
#define EXPECT_AR_COMPRESS_30_5
Definition raster-expected-phase17.h:109
#define EXPECT_AR_AXIS_BASE_10_8
Definition raster-expected-phase17.h:95
#define EXPECT_AR_STRETCH_6_6
Definition raster-expected-phase17.h:118
#define EXPECT_AR_NARROW_TALL_11_8
Definition raster-expected-phase17.h:159
#define EXPECT_AR_FLAT_WIDE_30_9
Definition raster-expected-phase17.h:171
#define EXPECT_AR_TWIST_45_8_8
Definition raster-expected-phase17.h:141
#define EXPECT_AR_NATURAL_18_15
Definition raster-expected-phase17.h:150
#define EXPECT_AR_FLAT_WIDE_6_10
Definition raster-expected-phase17.h:172
#define EXPECT_AR_STRETCH_10_7
Definition raster-expected-phase17.h:119
#define EXPECT_AR_AXIS_BASE_25_5
Definition raster-expected-phase17.h:99
#define EXPECT_AR_NATURAL_10_18
Definition raster-expected-phase17.h:151
#define EXPECT_AR_AXIS_BASE_20_6
Definition raster-expected-phase17.h:96
#define EXPECT_AR_NATURAL_5_5
Definition raster-expected-phase17.h:152
#define EXPECT_AR_TWIST_90_10_10
Definition raster-expected-phase17.h:129
#define EXPECT_AR_TWIST_45_12_12
Definition raster-expected-phase17.h:142
#define EXPECT_AR_FLAT_WIDE_8_9
Definition raster-expected-phase17.h:169
#define EXPECT_AR_AXIS_BASE_8_12
Definition raster-expected-phase17.h:97
#define EXPECT_AR_FLAT_WIDE_20_9
Definition raster-expected-phase17.h:170
#define EXPECT_AR_NARROW_TALL_12_14
Definition raster-expected-phase17.h:160
#define EXPECT_AR_AXIS_BASE_24_5
Definition raster-expected-phase17.h:98
#define EXPECT_AR_NARROW_TALL_13_6
Definition raster-expected-phase17.h:162
#define EXPECT_AR_COMPRESS_15_10
Definition raster-expected-phase17.h:108
#define EXPECT_AR_TWIST_45_12_4
Definition raster-expected-phase17.h:139
#define EXPECT_AR_TWIST_90_10_6
Definition raster-expected-phase17.h:131
#define EXPECT_AR_COMPRESS_10_7
Definition raster-expected-phase17.h:106
#define EXPECT_AR_NATURAL_12_10
Definition raster-expected-phase17.h:149
#define EXPECT_AR_TWIST_90_4_4
Definition raster-expected-phase17.h:132
#define EXPECT_AR_TWIST_45_4_12
Definition raster-expected-phase17.h:140
#define EXPECT_AR_COMPRESS_20_8
Definition raster-expected-phase17.h:107
#define EXPECT_AR_STRETCH_5_5
Definition raster-expected-phase17.h:121
#define EXPECT_AR_TWIST_90_6_10
Definition raster-expected-phase17.h:130
#define TEX17_TY
Definition texture-fixture-phase17.h:58
#define TEX17_TPAGE
Definition texture-fixture-phase17.h:65
#define TEX17_TX
Definition texture-fixture-phase17.h:57
#define PHASE17_ASSERT_PIXEL_EQ(expected, x_, y_)
Definition texture-fixture-phase17.h:102
#define TEX17_CLUT_FIELD
Definition texture-fixture-phase17.h:66
#define TEX_MOD_NEUTRAL
Definition texture-fixtures.h:328