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uv-overflow.c
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1/*
2
3MIT License
4
5Copyright (c) 2026 PCSX-Redux authors
6
7Permission is hereby granted, free of charge, to any person obtaining a copy
8of this software and associated documentation files (the "Software"), to deal
9in the Software without restriction, including without limitation the rights
10to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11copies of the Software, and to permit persons to whom the Software is
12furnished to do so, subject to the following conditions:
13
14The above copyright notice and this permission notice shall be included in all
15copies or substantial portions of the Software.
16
17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23SOFTWARE.
24
25*/
26
27// Overflow probes. Each test draws one oversized 8-bit textured rect
28// based at the test origin (0,0) with a chosen base UV, then reads
29// back a column (U sweep, row v=0) or row (V sweep, col u=0). The
30// fixture is texel(u,v) = (u+v)&0xff, so the texel sampled at
31// primitive-offset k from base b is ((b + k) & 0xff) iff the texel
32// coordinate wraps mod 256. Each expectation is therefore
33// expectedClut8Color((base + offset) & 0xff).
34
36
37// Draw an 8-bit textured rect at the origin with the given base UV and
38// size. Clears the rect footprint to the sentinel first so any pixel
39// that did NOT draw (e.g. a coordinate sampling transparent CLUT[0])
40// is distinguishable from a wrapped fetch.
41static void drawTex8Rect(uint8_t u0, uint8_t v0, int16_t w, int16_t h) {
42 rasterReset();
43 rasterClearTestRegion(0, 0, (int16_t)((w + 1) & ~1), h);
44 setTexpage(TEX8_TX, TEX8_TY, 1);
45 setTextureWindow(0, 0, 0, 0);
46 rasterTexRect(TEX_MOD_NEUTRAL, 0, 0, u0, v0, w, h, CLUT8_FIELD);
47 rasterFlushPrimitive();
48}
49
50) // CESTER_BODY
51
52// ============================================================================
53// U overflow. Wide rect (264 px) based at u=0. Columns 0..255 map to
54// u=0..255 (in range); columns 256..263 must wrap to u=0..7.
55// ============================================================================
56
57CESTER_TEST(ovf_u_base0_c5, gpu_raster_phase21,
58 drawTex8Rect(0, 0, 264, 2);
59 /* Control: in-range column, no overflow. u=5. */
60 ASSERT_PIXEL_EQ(expectedClut8Color(5), 5, 0);
61)
62
63CESTER_TEST(ovf_u_base0_c200, gpu_raster_phase21,
64 drawTex8Rect(0, 0, 264, 2);
65 /* Control: deep in-range column. u=200. */
66 ASSERT_PIXEL_EQ(expectedClut8Color(200), 200, 0);
67)
68
69CESTER_TEST(ovf_u_base0_c255, gpu_raster_phase21,
70 drawTex8Rect(0, 0, 264, 2);
71 /* Last in-range column. u=255. */
72 ASSERT_PIXEL_EQ(expectedClut8Color(255), 255, 0);
73)
74
75CESTER_TEST(ovf_u_base0_c256, gpu_raster_phase21,
76 drawTex8Rect(0, 0, 264, 2);
77 /* First overflow column: u counter hits 256 -> wraps to 0. */
78 ASSERT_PIXEL_EQ(expectedClut8Color(256 & 0xff), 256, 0);
79)
80
81CESTER_TEST(ovf_u_base0_c257, gpu_raster_phase21,
82 drawTex8Rect(0, 0, 264, 2);
83 /* Overflow -> u=1. */
84 ASSERT_PIXEL_EQ(expectedClut8Color(257 & 0xff), 257, 0);
85)
86
87CESTER_TEST(ovf_u_base0_c263, gpu_raster_phase21,
88 drawTex8Rect(0, 0, 264, 2);
89 /* Overflow -> u=7. */
90 ASSERT_PIXEL_EQ(expectedClut8Color(263 & 0xff), 263, 0);
91)
92
93// ============================================================================
94// U overflow with a non-zero base. Base u=200, width 64 -> the wrap
95// happens mid-rect at column 56 (200+56 = 256 -> 0).
96// ============================================================================
97
98CESTER_TEST(ovf_u_base200_c55, gpu_raster_phase21,
99 drawTex8Rect(200, 0, 64, 2);
100 /* u = 200+55 = 255, last before wrap. */
101 ASSERT_PIXEL_EQ(expectedClut8Color((200 + 55) & 0xff), 55, 0);
102)
103
104CESTER_TEST(ovf_u_base200_c56, gpu_raster_phase21,
105 drawTex8Rect(200, 0, 64, 2);
106 /* u = 200+56 = 256 -> wraps to 0. */
107 ASSERT_PIXEL_EQ(expectedClut8Color((200 + 56) & 0xff), 56, 0);
108)
109
110CESTER_TEST(ovf_u_base200_c57, gpu_raster_phase21,
111 drawTex8Rect(200, 0, 64, 2);
112 /* u -> 1. */
113 ASSERT_PIXEL_EQ(expectedClut8Color((200 + 57) & 0xff), 57, 0);
114)
115
116// ============================================================================
117// V overflow. Tall rect (264 px) based at v=0, sampled at col u=0.
118// Rows 0..255 map to v=0..255 (in range); rows 256..263 must wrap.
119// ============================================================================
120
121CESTER_TEST(ovf_v_base0_r5, gpu_raster_phase21,
122 drawTex8Rect(0, 0, 2, 264);
123 /* Control: in-range row. v=5 -> texel(0,5)=5. */
124 ASSERT_PIXEL_EQ(expectedClut8Color(5), 0, 5);
125)
126
127CESTER_TEST(ovf_v_base0_r255, gpu_raster_phase21,
128 drawTex8Rect(0, 0, 2, 264);
129 /* Last in-range row. v=255. */
130 ASSERT_PIXEL_EQ(expectedClut8Color(255), 0, 255);
131)
132
133CESTER_TEST(ovf_v_base0_r256, gpu_raster_phase21,
134 drawTex8Rect(0, 0, 2, 264);
135 /* First overflow row: v counter hits 256 -> wraps to 0. */
136 ASSERT_PIXEL_EQ(expectedClut8Color(256 & 0xff), 0, 256);
137)
138
139CESTER_TEST(ovf_v_base0_r257, gpu_raster_phase21,
140 drawTex8Rect(0, 0, 2, 264);
141 /* Overflow -> v=1. */
142 ASSERT_PIXEL_EQ(expectedClut8Color(257 & 0xff), 0, 257);
143)
CESTER_BODY(static int s_got40;static int s_got80;static uint32_t s_cause;static uint32_t s_epc;static uint32_t s_from;static uint32_t *s_resume;static uint32_t *s_regs;static uint32_t(*s_customhandler)()=NULL;static uint32_t s_oldIMASK;static uint32_t s_oldDPCR;static uint32_t s_oldDICR;uint32_t handler(uint32_t *regs, uint32_t from) { if(from==0x40) s_got40=1;if(from==0x80) s_got80=1;uint32_t cause;uint32_t epc;s_from=from;asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" :"=r"(cause), "=r"(epc));s_cause=cause;s_epc=epc;if(s_customhandler) { return s_customhandler();} else { return s_resume ?((uint32_t) s_resume) :(epc+4);} } void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from));void uninstallExceptionHandlers();uint32_t branchbranch1();uint32_t branchbranch2();uint32_t jumpjump1();uint32_t jumpjump2();uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);uint32_t linkandload();uint32_t lwandlink();uint32_t nolink();static int s_interruptsWereEnabled;) CESTER_BEFORE_EACH(cpu_tests
CESTER_TEST(cpu_cop0_basic_write_bp, cpu_tests, uint32_t expectedEPC;uint32_t t;volatile uint32_t *ptr=(volatile uint32_t *) 0x58; *ptr=1;__asm__ volatile("" " lui %0, 0b1100101010000000\n" " mtc0 %0, $7\n" " li %0, 0x58\n" " mtc0 %0, $5\n" " li %0, 0xfffffff0\n" " mtc0 %0, $9\n" :"=r"(t));cester_assert_uint_eq(1, *ptr);__asm__ volatile("la %0, 1f\n1:\nsw $0, 0x58($0)" :"=r"(expectedEPC));__asm__ volatile("mtc0 $0, $7\n");cester_assert_uint_eq(0, *ptr);cester_assert_uint_eq(1, s_got40);cester_assert_uint_eq(0, s_got80);cester_assert_uint_eq(0x40, s_from);cester_assert_uint_eq(expectedEPC, s_epc);) CESTER_TEST(cpu_cop0_kseg_write_bp
#define ASSERT_PIXEL_EQ(expected, x_, y_)
Definition raster-helpers.h:472
#define CLUT8_FIELD
Definition texture-fixtures.h:84
#define TEX8_TY
Definition texture-fixtures.h:61
#define TEX8_TX
Definition texture-fixtures.h:60
#define TEX_MOD_NEUTRAL
Definition texture-fixtures.h:328