cdlinit.c File Reference

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Functions
	CESTER_TEST (cdlInit, test_instance, initializeTime();CDROM_REG0=1;CDROM_REG3=0x1f;CDROM_REG0=1;CDROM_REG2=0x1f;CDROM_REG0=0;CDROM_REG1=CDL_INIT;uint32_t ackTime=waitCDRomIRQ();uint8_t cause1=ackCDRomCause();uint8_t ctrl1=CDROM_REG0 &~3;uint8_t response1[16];uint8_t responseSize1=readResponse(response1);uint8_t ctrl2=CDROM_REG0 &~3;CDROM_REG0=1;uint8_t cause1b=CDROM_REG3_UC;uint32_t completeTime=waitCDRomIRQ() - ackTime;uint8_t cause2=ackCDRomCause();uint8_t ctrl3=CDROM_REG0 &~3;uint8_t response2[16];uint8_t responseSize2=readResponse(response2);uint8_t ctrl4=CDROM_REG0 &~3;CDROM_REG0=1;uint8_t cause2b=CDROM_REG3_UC;cester_assert_uint_eq(3, cause1);cester_assert_uint_eq(2, cause2);cester_assert_uint_eq(0xe0, cause1b);cester_assert_uint_eq(0xe0, cause2b);cester_assert_uint_eq(2, response1[0]);cester_assert_uint_eq(1, responseSize1);cester_assert_uint_eq(2, response2[0]);cester_assert_uint_eq(1, responseSize2);cester_assert_uint_eq(0x38, ctrl1);cester_assert_uint_eq(0x18, ctrl2);cester_assert_uint_eq(0x38, ctrl3);cester_assert_uint_eq(0x18, ctrl4);cester_assert_uint_ge(ackTime, 500);cester_assert_uint_lt(ackTime, 7000);cester_assert_uint_ge(completeTime, 50000);cester_assert_uint_lt(completeTime, 150000);ramsyscall_printf("Basic initialization: CD-Rom controller initialized, ack in %ius, complete in %ius\n", ackTime, completeTime);) CESTER_TEST(cdlInitDelayed
	initializeTime ()
	while (((IREG &IRQ_CDROM)==0) &&(delayedTime<=500000))

Variables
	test_instance
	CDROM_REG0 = 1
	CDROM_REG3 = 0x1f
	CDROM_REG2 = 0x1f
	CDROM_REG1 = CDL_INIT
uint32_t	ackTime = waitCDRomIRQ()
uint32_t	delayedTime
	do
int	gotIRQ = (IREG & IRQ_CDROM) != 0

Function Documentation

CESTER_TEST()

CESTER_TEST	(	cdlInit	,
		test_instance	,
		initializeTime();	CDROM_REG0 = 1; CDROM_REG3 = 0x1f; CDROM_REG0 = 1; CDROM_REG2 = 0x1f; CDROM_REG0 = 0; CDROM_REG1 = CDL_INIT; uint32_t ackTime = waitCDRomIRQ(); uint8_t cause1 = ackCDRomCause(); uint8_t ctrl1 = CDROM_REG0 & ~3; uint8_t response1[16]; uint8_t responseSize1 = readResponse(response1); uint8_t ctrl2 = CDROM_REG0 & ~3; CDROM_REG0 = 1; uint8_t cause1b = CDROM_REG3_UC; uint32_t completeTime = waitCDRomIRQ() - ackTime; uint8_t cause2 = ackCDRomCause(); uint8_t ctrl3 = CDROM_REG0 & ~3; uint8_t response2[16]; uint8_t responseSize2 = readResponse(response2); uint8_t ctrl4 = CDROM_REG0 & ~3; CDROM_REG0 = 1; uint8_t cause2b = CDROM_REG3_UC; cester_assert_uint_eq(3, cause1); cester_assert_uint_eq(2, cause2); cester_assert_uint_eq(0xe0, cause1b); cester_assert_uint_eq(0xe0, cause2b); cester_assert_uint_eq(2, response1[0]); cester_assert_uint_eq(1, responseSize1); cester_assert_uint_eq(2, response2[0]); cester_assert_uint_eq(1, responseSize2); cester_assert_uint_eq(0x38, ctrl1); cester_assert_uint_eq(0x18, ctrl2); cester_assert_uint_eq(0x38, ctrl3); cester_assert_uint_eq(0x18, ctrl4);  cester_assert_uint_ge(ackTime, 500); cester_assert_uint_lt(ackTime, 7000);   cester_assert_uint_ge(completeTime, 50000); cester_assert_uint_lt(completeTime, 150000); ramsyscall_printf("Basic initialization: CD-Rom controller initialized, ack in %ius, complete in %ius\n", ackTime, completeTime);
	)

initializeTime()

initializeTime

(

)

while()

while

(

((IREG &IRQ_CDROM)==0) &&(delayedTime<=500000)

)

Variable Documentation

ackTime

uint32_t ackTime = waitCDRomIRQ()

CDROM_REG0

CDROM_REG0 = 1

CDROM_REG1

CDROM_REG1 = CDL_INIT

CDROM_REG2

CDROM_REG2 = 0x1f

CDROM_REG3

CDROM_REG3 = 0x1f

delayedTime

uint32_t delayedTime

do

do

Initial value:

{
        delayedTime = updateTime()

gotIRQ

int gotIRQ = (IREG & IRQ_CDROM) != 0

test_instance

test_instance