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raster-expected-phase16.h
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1/*
2
3MIT License
4
5Copyright (c) 2026 PCSX-Redux authors
6
7Permission is hereby granted, free of charge, to any person obtaining a copy
8of this software and associated documentation files (the "Software"), to deal
9in the Software without restriction, including without limitation the rights
10to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11copies of the Software, and to permit persons to whom the Software is
12furnished to do so, subject to the following conditions:
13
14The above copyright notice and this permission notice shall be included in all
15copies or substantial portions of the Software.
16
17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23SOFTWARE.
24
25*/
26
27#pragma once
28
29// Phase-16 expected values. Off-page U values land in undefined VRAM
30// regions outside the fixture pages; hardware truth gets captured on
31// first run. The captured values tell us whether hardware wraps mod
32// page-width or extends into adjacent VRAM.
33
34#include "raster-helpers.h"
35#include "texture-fixtures.h"
36
37// 8-bit: page width = 128 in texel coords. Above 127 is off-page
38// per psx-spx documentation.
39//
40// HARDWARE FINDING (verified 2026-05-16): U does NOT wrap at the
41// documented page boundary. Hardware reads linearly into adjacent
42// VRAM. With the full TEX8 fixture spanning u=0..255 (128 VRAM
43// pixels wide starting at x=576), u=128 reads VRAM (640, 0) which
44// is just past the 8-bit page extent but still produces a defined
45// byte value (overlap with the TEX15 fixture's data).
46//
47// Values captured below are the byte content at the sampled VRAM
48// position, looked up through CLUT8. They confirm hardware does
49// not apply any modular wrap on U at the texpage boundary.
50//
51// psx-spx note worth filing: the "wrap within the page" claim
52// doesn't match hardware. The behaviour is "read whatever VRAM
53// byte the linear U offset addresses."
54#define UV8_U128_V0 0x03e0u /* reads beyond 128-texel page */
55#define UV8_U200_V0 0x0364u
56#define UV8_U255_V0 0x0c7cu
57#define UV8_U0_V255 0x1c1fu /* beyond TEX8 v-extent */
58
59// 15-bit: page width = 64. Off-page samples land in uninitialised
60// VRAM beyond the fixture upload. Hardware returns whatever value
61// happens to be there (which in our tests coincidentally matches
62// the test-region sentinel pre-fill 0xDEAD).
63#define UV15_U64_V0 RASTER_SENTINEL /* beyond TEX15 upload */
64#define UV15_U128_V0 RASTER_SENTINEL /* deep off-page */
65#define UV15_U255_V0 RASTER_SENTINEL /* deep off-page */
66
67// 4-bit: page width = 256. Outside the 16-texel fixture pattern
68// (u > 15) but still within page. Hardware samples VRAM with
69// whatever it finds there.
70#define UV4_U16_V0 0x0364u
71#define UV4_U255_V0 0x03e0u