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cester-cop0.c
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1/*
2
3MIT License
4
5Copyright (c) 2022 PCSX-Redux authors
6
7Permission is hereby granted, free of charge, to any person obtaining a copy
8of this software and associated documentation files (the "Software"), to deal
9in the Software without restriction, including without limitation the rights
10to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11copies of the Software, and to permit persons to whom the Software is
12furnished to do so, subject to the following conditions:
13
14The above copyright notice and this permission notice shall be included in all
15copies or substantial portions of the Software.
16
17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23SOFTWARE.
24
25*/
26
27// This file isn't to be compiled directly. It's to be included in every
28// sub test .c file that requires access to the exception handler test system.
29
30// clang-format off
31
33 static int s_got40;
34 static int s_got80;
35 static uint32_t s_cause;
36 static uint32_t s_epc;
37 static uint32_t s_from;
38 static uint32_t * s_resume;
39 static uint32_t * s_regs;
40 static uint32_t (*s_customhandler)() = NULL;
41 static uint32_t s_oldIMASK;
42 static uint32_t s_oldDPCR;
43 static uint32_t s_oldDICR;
44 uint32_t handler(uint32_t * regs, uint32_t from) {
45 if (from == 0x40) s_got40 = 1;
46 if (from == 0x80) s_got80 = 1;
47
48 uint32_t cause;
49 uint32_t epc;
50
51 s_from = from;
52
53 asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" : "=r"(cause), "=r"(epc));
54
55 s_cause = cause;
56 s_epc = epc;
57
58 if (s_customhandler) {
59 return s_customhandler();
60 } else {
61 return s_resume ? ((uint32_t)s_resume) : (epc + 4);
62 }
63 }
66
67 uint32_t branchbranch1();
68 uint32_t branchbranch2();
69 uint32_t jumpjump1();
70 uint32_t jumpjump2();
71 uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);
72 uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);
73 uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);
74 uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);
75 uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);
76 uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);
77 uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);
78 uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);
79 uint32_t linkandload();
80 uint32_t lwandlink();
81 uint32_t nolink();
82
83 static int s_interruptsWereEnabled;
84)
85
86CESTER_BEFORE_EACH(cpu_tests, testname, testindex,
90 IMASK = 0;
91 IREG = 0;
92 for (unsigned i = 0; i < 7; i++) {
93 DMA_CTRL[i].CHCR = 0;
94 DMA_CTRL[i].BCR = 0;
95 DMA_CTRL[i].MADR = 0;
96 }
97 DPCR = 0;
100 DICR = 0;
104 s_epc = 0;
106 s_resume = NULL;
107 s_regs = NULL;
109)
110
111CESTER_AFTER_EACH(cpu_tests, testname, testindex,
113 DPCR = s_oldDPCR;
114 DICR = s_oldDICR;
115)
116
117CESTER_BEFORE_ALL(cpu_tests,
118 s_interruptsWereEnabled = enterCriticalSection();
120 syscall_flushCache();
121)
122
123CESTER_AFTER_ALL(cpu_tests,
125 syscall_flushCache();
126 if (s_interruptsWereEnabled) leaveCriticalSection();
127)
128
s_got80
Definition cester-cop0.c:102
s_got40
Definition cester-cop0.c:101
testname
Definition cester-cop0.c:86
s_regs
Definition cester-cop0.c:107
CESTER_BODY(static int s_got40;static int s_got80;static uint32_t s_cause;static uint32_t s_epc;static uint32_t s_from;static uint32_t *s_resume;static uint32_t *s_regs;static uint32_t(*s_customhandler)()=NULL;static uint32_t s_oldIMASK;static uint32_t s_oldDPCR;static uint32_t s_oldDICR;uint32_t handler(uint32_t *regs, uint32_t from) { if(from==0x40) s_got40=1;if(from==0x80) s_got80=1;uint32_t cause;uint32_t epc;s_from=from;asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" :"=r"(cause), "=r"(epc));s_cause=cause;s_epc=epc;if(s_customhandler) { return s_customhandler();} else { return s_resume ?((uint32_t) s_resume) :(epc+4);} } void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from));void uninstallExceptionHandlers();uint32_t branchbranch1();uint32_t branchbranch2();uint32_t jumpjump1();uint32_t jumpjump2();uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);uint32_t linkandload();uint32_t lwandlink();uint32_t nolink();static int s_interruptsWereEnabled;) CESTER_BEFORE_EACH(cpu_tests
s_from
Definition cester-cop0.c:105
IREG
Definition cester-cop0.c:91
s_customhandler
Definition cester-cop0.c:108
s_epc
Definition cester-cop0.c:104
s_oldDPCR
Definition cester-cop0.c:88
DICR
Definition cester-cop0.c:99
testindex
Definition cester-cop0.c:86
uint32_t dicr
Definition cester-cop0.c:98
IMASK
Definition cester-cop0.c:90
DPCR
Definition cester-cop0.c:97
s_resume
Definition cester-cop0.c:106
s_cause
Definition cester-cop0.c:103
s_oldDICR
Definition cester-cop0.c:89
s_oldIMASK
Definition cester-cop0.c:87
cpu_tests
Definition cop0.c:78
uint32_t buff[2]
Definition cpu.c:77
#define DMA_CTRL
Definition dma.h:36
void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from))
Definition exceptions.cpp:70
void uninstallExceptionHandlers()
Definition exceptions.cpp:84
static uint32_t uint32_t void(* handler)())
Definition syscalls.h:370
void uint32_t(classId, spec)