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texture-basic.c
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1/*
2
3MIT License
4
5Copyright (c) 2026 PCSX-Redux authors
6
7Permission is hereby granted, free of charge, to any person obtaining a copy
8of this software and associated documentation files (the "Software"), to deal
9in the Software without restriction, including without limitation the rights
10to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11copies of the Software, and to permit persons to whom the Software is
12furnished to do so, subject to the following conditions:
13
14The above copyright notice and this permission notice shall be included in all
15copies or substantial portions of the Software.
16
17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23SOFTWARE.
24
25*/
26
27// Textured triangle basic sampling correctness at 4-bit, 8-bit, and
28// 15-bit depths. Triangles are drawn with vertex UVs matching screen
29// positions 1:1 so pixel (x, y) samples texel (x, y). The fixture
30// textures encode known functions of (u, v) so we can predict and
31// assert the exact VRAM color at each rasterized pixel.
32//
33// The audit's drawPoly3TEx4 / drawPoly3TEx8 / drawPoly3TD paths get
34// exercised here for the first time - phase 1-3 were all untextured.
35//
36// Texture command color: 0x808080 (neutral modulation - texel passes
37// through unchanged at 128/128 = 1.0).
38
40
41static void drawTex4Tri(void) {
42 rasterReset();
43 rasterClearTestRegion(0, 0, 32, 16);
44 setTexpage(TEX4_TX, TEX4_TY, 0);
45 setTextureWindow(0, 0, 0, 0);
46 /* Triangle (0,0)-(16,0)-(0,8) with UV matching screen. */
47 rasterTexTri(TEX_MOD_NEUTRAL,
48 0, 0, 0, 0,
49 16, 0, 16, 0,
50 0, 8, 0, 8,
52 rasterFlushPrimitive();
53}
54
55static void drawTex8Tri(void) {
56 rasterReset();
57 rasterClearTestRegion(0, 0, 64, 16);
58 setTexpage(TEX8_TX, TEX8_TY, 1);
59 setTextureWindow(0, 0, 0, 0);
60 /* Wider triangle to span more 8-bit texels. */
61 rasterTexTri(TEX_MOD_NEUTRAL,
62 0, 0, 0, 0,
63 32, 0, 32, 0,
64 0, 8, 0, 8,
66 rasterFlushPrimitive();
67}
68
69static void drawTex15Tri(void) {
70 rasterReset();
71 rasterClearTestRegion(0, 0, 32, 16);
72 setTexpage(TEX15_TX, TEX15_TY, 2);
73 setTextureWindow(0, 0, 0, 0);
74 rasterTexTri(TEX_MOD_NEUTRAL,
75 0, 0, 0, 0,
76 16, 0, 16, 0,
77 0, 8, 0, 8,
79 rasterFlushPrimitive();
80}
81
82// Single-pixel 4-bit textured triangle. Reads back exactly one pixel
83// and expects the texel at UV (3, 3) -> CLUT[3].
84static void drawTex4Single(void) {
85 rasterReset();
86 rasterClearTestRegion(20, 20, 4, 4);
87 setTexpage(TEX4_TX, TEX4_TY, 0);
88 setTextureWindow(0, 0, 0, 0);
89 rasterTexTri(TEX_MOD_NEUTRAL,
90 20, 20, 3, 3,
91 21, 20, 4, 3,
92 20, 21, 3, 4,
94 rasterFlushPrimitive();
95}
96
97) // CESTER_BODY
98
99// --------------------------------------------------------------------------
100// 4-bit CLUT triangle - basic sampling
101// --------------------------------------------------------------------------
102
103CESTER_TEST(tex4_pixel_0_0, gpu_raster_phase4,
104 drawTex4Tri();
105 /* At screen (0, 0), UV = (0, 0), texel = 0 & 0xf = 0,
106 CLUT[0] = vram555(0, 31, 0) = 0x03E0 (green). */
107 ASSERT_PIXEL_EQ(expectedClut4Color(0), 0, 0);
108)
109
110CESTER_TEST(tex4_pixel_3_0, gpu_raster_phase4,
111 drawTex4Tri();
112 ASSERT_PIXEL_EQ(expectedClut4Color(3), 3, 0);
113)
114
115CESTER_TEST(tex4_pixel_7_0, gpu_raster_phase4,
116 drawTex4Tri();
117 ASSERT_PIXEL_EQ(expectedClut4Color(7), 7, 0);
118)
119
120CESTER_TEST(tex4_pixel_15_0, gpu_raster_phase4,
121 drawTex4Tri();
122 ASSERT_PIXEL_EQ(expectedClut4Color(15), 15, 0);
123)
124
125CESTER_TEST(tex4_pixel_16_0_right_edge, gpu_raster_phase4,
126 drawTex4Tri();
127 /* x=16 is the right edge of the triangle (top-left rule excludes). */
129)
130
131CESTER_TEST(tex4_pixel_0_4_interior, gpu_raster_phase4,
132 drawTex4Tri();
133 /* At y=4, the hypotenuse limits x to about (16 * (8-4)/8) = 8.
134 Pixel (0, 4) is well inside. UV at screen (0, 4) is (0, 4),
135 texel = 0, CLUT[0]. */
136 ASSERT_PIXEL_EQ(expectedClut4Color(0), 0, 4);
137)
138
139CESTER_TEST(tex4_pixel_5_4_interior, gpu_raster_phase4,
140 drawTex4Tri();
141 ASSERT_PIXEL_EQ(expectedClut4Color(5), 5, 4);
142)
143
144CESTER_TEST(tex4_pixel_0_7_bottom_inner, gpu_raster_phase4,
145 drawTex4Tri();
146 ASSERT_PIXEL_EQ(expectedClut4Color(0), 0, 7);
147)
148
149CESTER_TEST(tex4_pixel_0_8_bottom_excluded, gpu_raster_phase4,
150 drawTex4Tri();
152)
153
154CESTER_TEST(tex4_single_pixel_at_20_20, gpu_raster_phase4,
155 drawTex4Single();
156 /* 1-pixel triangle at (20,20) with UV (3,3) -> CLUT[3]. */
157 ASSERT_PIXEL_EQ(expectedClut4Color(3), 20, 20);
158)
159
160CESTER_TEST(tex4_single_pixel_complement_21_20, gpu_raster_phase4,
161 drawTex4Single();
163)
164
165// --------------------------------------------------------------------------
166// 8-bit CLUT triangle - basic sampling
167// --------------------------------------------------------------------------
168
169CESTER_TEST(tex8_pixel_0_0, gpu_raster_phase4,
170 drawTex8Tri();
171 ASSERT_PIXEL_EQ(expectedClut8Color(0), 0, 0);
172)
173
174CESTER_TEST(tex8_pixel_7_0, gpu_raster_phase4,
175 drawTex8Tri();
176 ASSERT_PIXEL_EQ(expectedClut8Color(7), 7, 0);
177)
178
179CESTER_TEST(tex8_pixel_15_0, gpu_raster_phase4,
180 drawTex8Tri();
181 ASSERT_PIXEL_EQ(expectedClut8Color(15), 15, 0);
182)
183
184CESTER_TEST(tex8_pixel_31_0, gpu_raster_phase4,
185 drawTex8Tri();
186 ASSERT_PIXEL_EQ(expectedClut8Color(31), 31, 0);
187)
188
189CESTER_TEST(tex8_pixel_32_0_right_edge, gpu_raster_phase4,
190 drawTex8Tri();
192)
193
194CESTER_TEST(tex8_pixel_10_4_interior, gpu_raster_phase4,
195 drawTex8Tri();
196 ASSERT_PIXEL_EQ(expectedClut8Color(10), 10, 4);
197)
198
199CESTER_TEST(tex8_pixel_0_7_bottom_inner, gpu_raster_phase4,
200 drawTex8Tri();
201 ASSERT_PIXEL_EQ(expectedClut8Color(0), 0, 7);
202)
203
204CESTER_TEST(tex8_pixel_0_8_bottom_excluded, gpu_raster_phase4,
205 drawTex8Tri();
207)
208
209// --------------------------------------------------------------------------
210// 15-bit direct triangle - basic sampling
211// --------------------------------------------------------------------------
212
213CESTER_TEST(tex15_pixel_0_0_transparent, gpu_raster_phase4,
214 drawTex15Tri();
215 /* TEXEL 0x0000 IS TRANSPARENT - canonical PSX rule (HW_VERIFIED
216 2026-05-15). At screen (0, 0), UV = (0, 0), the fixture texel
217 is vram555(0, 0, 0) = 0x0000. The rasterizer detects all-zero
218 texel and skips the write, so the destination stays sentinel.
219 This applies to ALL three texture depths: a CLUT entry of
220 0x0000 OR a direct 15-bit texel of 0x0000 = transparent. */
222)
223
224CESTER_TEST(tex15_pixel_5_0, gpu_raster_phase4,
225 drawTex15Tri();
226 ASSERT_PIXEL_EQ(expectedTex15Color(5, 0), 5, 0);
227)
228
229CESTER_TEST(tex15_pixel_15_0, gpu_raster_phase4,
230 drawTex15Tri();
231 ASSERT_PIXEL_EQ(expectedTex15Color(15, 0), 15, 0);
232)
233
234CESTER_TEST(tex15_pixel_16_0_right_edge, gpu_raster_phase4,
235 drawTex15Tri();
237)
238
239CESTER_TEST(tex15_pixel_0_4_interior, gpu_raster_phase4,
240 drawTex15Tri();
241 ASSERT_PIXEL_EQ(expectedTex15Color(0, 4), 0, 4);
242)
243
244CESTER_TEST(tex15_pixel_5_4_interior, gpu_raster_phase4,
245 drawTex15Tri();
246 ASSERT_PIXEL_EQ(expectedTex15Color(5, 4), 5, 4);
247)
248
249CESTER_TEST(tex15_pixel_0_7_bottom_inner, gpu_raster_phase4,
250 drawTex15Tri();
251 ASSERT_PIXEL_EQ(expectedTex15Color(0, 7), 0, 7);
252)
253
254CESTER_TEST(tex15_pixel_0_8_bottom_excluded, gpu_raster_phase4,
255 drawTex15Tri();
257)
CESTER_BODY(static int s_got40;static int s_got80;static uint32_t s_cause;static uint32_t s_epc;static uint32_t s_from;static uint32_t *s_resume;static uint32_t *s_regs;static uint32_t(*s_customhandler)()=NULL;static uint32_t s_oldIMASK;static uint32_t s_oldDPCR;static uint32_t s_oldDICR;uint32_t handler(uint32_t *regs, uint32_t from) { if(from==0x40) s_got40=1;if(from==0x80) s_got80=1;uint32_t cause;uint32_t epc;s_from=from;asm("mfc0 %0, $13\nnop\nmfc0 %1, $14\nnop" :"=r"(cause), "=r"(epc));s_cause=cause;s_epc=epc;if(s_customhandler) { return s_customhandler();} else { return s_resume ?((uint32_t) s_resume) :(epc+4);} } void installExceptionHandlers(uint32_t(*handler)(uint32_t *regs, uint32_t from));void uninstallExceptionHandlers();uint32_t branchbranch1();uint32_t branchbranch2();uint32_t jumpjump1();uint32_t jumpjump2();uint32_t cpu_LWR_LWL_half(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_nodelay(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_delayed(uint32_t buff[], uint32_t initial);uint32_t cpu_LWR_LWL_load_different(uint32_t buff[], uint32_t initial);uint32_t cpu_LW_LWR(uint32_t buff[], uint32_t initial);uint32_t cpu_delayed_load(uint32_t buff[], uint32_t override);uint32_t cpu_delayed_load_cancelled(uint32_t buff[], uint32_t override);uint64_t cpu_delayed_load_load(uint32_t buff[], uint32_t override);uint32_t linkandload();uint32_t lwandlink();uint32_t nolink();static int s_interruptsWereEnabled;) CESTER_BEFORE_EACH(cpu_tests
CESTER_TEST(cpu_cop0_basic_write_bp, cpu_tests, uint32_t expectedEPC;uint32_t t;volatile uint32_t *ptr=(volatile uint32_t *) 0x58; *ptr=1;__asm__ volatile("" " lui %0, 0b1100101010000000\n" " mtc0 %0, $7\n" " li %0, 0x58\n" " mtc0 %0, $5\n" " li %0, 0xfffffff0\n" " mtc0 %0, $9\n" :"=r"(t));cester_assert_uint_eq(1, *ptr);__asm__ volatile("la %0, 1f\n1:\nsw $0, 0x58($0)" :"=r"(expectedEPC));__asm__ volatile("mtc0 $0, $7\n");cester_assert_uint_eq(0, *ptr);cester_assert_uint_eq(1, s_got40);cester_assert_uint_eq(0, s_got80);cester_assert_uint_eq(0x40, s_from);cester_assert_uint_eq(expectedEPC, s_epc);) CESTER_TEST(cpu_cop0_kseg_write_bp
#define ASSERT_PIXEL_UNTOUCHED(x_, y_)
Definition raster-helpers.h:485
#define ASSERT_PIXEL_EQ(expected, x_, y_)
Definition raster-helpers.h:472
#define CLUT8_FIELD
Definition texture-fixtures.h:84
#define TEX15_TY
Definition texture-fixtures.h:66
#define TEX8_TY
Definition texture-fixtures.h:61
#define CLUT4_FIELD
Definition texture-fixtures.h:83
#define TEX15_TPAGE
Definition texture-fixtures.h:104
#define TEX8_TPAGE
Definition texture-fixtures.h:103
#define CLUT15_FIELD
Definition texture-fixtures.h:85
#define TEX15_TX
Definition texture-fixtures.h:65
#define TEX8_TX
Definition texture-fixtures.h:60
#define TEX_MOD_NEUTRAL
Definition texture-fixtures.h:328
#define TEX4_TY
Definition texture-fixtures.h:56
#define TEX4_TX
Definition texture-fixtures.h:55
#define TEX4_TPAGE
Definition texture-fixtures.h:102