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pcdrv.h
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1/*
2
3MIT License
4
5Copyright (c) 2021 PCSX-Redux authors
6
7Permission is hereby granted, free of charge, to any person obtaining a copy
8of this software and associated documentation files (the "Software"), to deal
9in the Software without restriction, including without limitation the rights
10to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11copies of the Software, and to permit persons to whom the Software is
12furnished to do so, subject to the following conditions:
13
14The above copyright notice and this permission notice shall be included in all
15copies or substantial portions of the Software.
16
17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23SOFTWARE.
24
25*/
26
27#pragma once
28
29// This is a reverse of the libsn pcdrv API. It doesn't make a lot of sense.
30
31static inline int PCinit() {
32 register int r asm("v0");
33 __asm__ volatile("break 0, 0x101\n" : "=r"(r));
34 return r;
35}
36
37static inline int PCcreat(const char *name, int perms) {
38 register const char *a0 asm("a0") = name;
39 register const char *a1 asm("a1") = name;
40 register int a2 asm("a2") = 0;
41 register int v0 asm("v0");
42 register int v1 asm("v1");
43 __asm__ volatile("break 0, 0x102\n" : "=r"(v0), "=r"(v1) : "r"(a0), "r"(a1), "r"(a2));
44 if (v0 == 0) return v1;
45 return -1;
46}
47
48static inline int PCopen(const char *name, int flags, int perms) {
49 register int a2 asm("a2") = flags;
50 register const char *a0 asm("a0") = name;
51 register const char *a1 asm("a1") = name;
52 register int v0 asm("v0");
53 register int v1 asm("v1");
54 __asm__ volatile("break 0, 0x103\n" : "=r"(v0), "=r"(v1) : "r"(a0), "r"(a1), "r"(a2));
55 if (v0 == 0) return v1;
56 return -1;
57}
58
59static inline int PCclose(int fd) {
60 register int a0 asm("a0") = fd;
61 register int a1 asm("a1") = fd;
62 register int v0 asm("v0");
63 __asm__ volatile("break 0, 0x104\n" : "=r"(v0) : "r"(a0), "r"(a1) : "v1");
64 return v0;
65}
66
67static inline int PCread(int fd, void *buf, int len) {
68 register int a0 asm("a0") = 0;
69 register int a1 asm("a1") = fd;
70 register int a2 asm("a2") = len;
71 register void *a3 asm("a3") = buf;
72 register int v0 asm("v0");
73 register int v1 asm("v1");
74 __asm__ volatile("break 0, 0x105\n" : "=r"(v0), "=r"(v1) : "r"(a0), "r"(a1), "r"(a2), "r"(a3) : "memory");
75 if (v0 == 0) return v1;
76 return -1;
77}
78
79static inline int PCwrite(int fd, const void *buf, int len) {
80 register int a0 asm("a0") = 0;
81 register int a1 asm("a1") = fd;
82 register int a2 asm("a2") = len;
83 register const void *a3 asm("a3") = buf;
84 register int v0 asm("v0");
85 register int v1 asm("v1");
86 __asm__ volatile("break 0, 0x106\n" : "=r"(v0), "=r"(v1) : "r"(a0), "r"(a1), "r"(a2), "r"(a3));
87 if (v0 == 0) return v1;
88 return -1;
89}
90
91static inline int PClseek(int fd, int offset, int wheel) {
92 register int a3 asm("a3") = wheel;
93 register int a2 asm("a2") = offset;
94 register int a0 asm("a0") = fd;
95 register int a1 asm("a1") = fd;
96 register int v0 asm("v0");
97 register int v1 asm("v1");
98 __asm__ volatile("break 0, 0x107\n" : "=r"(v0), "=r"(v1) : "r"(a0), "r"(a1), "r"(a2), "r"(a3));
99 if (v0 == 0) return v1;
100 return -1;
101}
uint32_t r
Definition cpu.c:222
static const void * buf
Definition syscalls.h:60
static uint16_t uint16_t flags
Definition syscalls.h:333